Short code length block code decoder device based on two finite group symbols

A decoder and block code technology, which is applied in the field of digital communication error control coding, can solve the problems of complexity, high decoding complexity, multiple candidate codewords, etc., and achieve the effect of low complexity and easy hardware implementation

Inactive Publication Date: 2012-10-24
TIANJIN UNIV
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  • Abstract
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  • Claims
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Problems solved by technology

[0010] For a special class of short code length block codes, that is, short code length block codes composed of two finite group symbols, it can be expressed by H=[a,b], where a,b∈G(2 p ), G(2 p ) is the order of 2 p The finite group of , the decoding algorithm based on the trellis graph has superior performance, but due to the complexity of the trellis graph obtained, the decoding implementation complexity is very high
On the other hand, reliability-based decoding algorithms need to generate more candidate codewords and are more complex

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  • Short code length block code decoder device based on two finite group symbols
  • Short code length block code decoder device based on two finite group symbols
  • Short code length block code decoder device based on two finite group symbols

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Embodiment Construction

[0049] In order to make the object, technical solution and advantages of the present invention clearer, the implementation manner of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0050] To reduce computational complexity, see figure 1 , the embodiment of the present invention provides a short code length block code decoder device based on two finite group symbols, see the following description for details:

[0051] The short code length block code decoder device based on two finite group symbols provided by the embodiment of the present invention is realized by a Field Programmable Gate Array (Field Programmable Gate Array, FPGA) or a Very Large Scale Integration (VLSI) circuit .

[0052] A short code length block code decoder device based on two finite group symbols, see figure 1 Including: a control circuit 1, an input buffer unit 2, a decoding operation unit 3 and an output buffer unit 4 respectively conne...

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Abstract

The invention discloses a short code length block code decoder device based on two finite group symbols, and belongs to the error control coding field of digital communications. The decoder device disclosed by the invention comprises a control circuit, an input buffer unit, an output buffer unit and a decoding calculation unit, wherein the decoding calculation unit is the core part of the decoder and comprises a prior probability generation circuit, a prior probability storage unit, a posterior probability calculation circuit and a sequencing decision circuit which are connected in sequence. The prior probability generation circuit uses a plurality of basic units which are connected in sequence, has a regular structure, and is convenient for the circuit realization; the prior probability storage unit realizes data interleaving through a read-write address and is relatively low in complexity; and both the posterior probability calculation circuit and the sequencing decision circuit use a realizing method which is relatively low in complexity. In conclusion, the short code length block code decoder device based on two finite group symbols is realized, the complexity of the hardware is relatively low, and the performance is good.

Description

technical field [0001] The invention belongs to the field of digital communication error control coding, in particular to a short code length block code decoder device based on two finite group symbols with low decoding complexity. Background technique [0002] In modern digital signal transmission and storage systems, errors in digital signal transmission or storage are often caused by transmission channel noise or physical damage to storage media. Therefore, in order to ensure the reliability of digital signal transmission or storage, error control coding technology has become a standard technology. [0003] Currently commonly used error control codes include block codes. The block code is to divide the information sequence output by the information source into k information elements, and generate r check elements according to certain rules through the encoder, and output a length of n=k+r code group. The block code is represented by (n, k), where n represents the code ...

Claims

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Application Information

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IPC IPC(8): H03M13/11
Inventor 陈为刚冯秀川杨晋生梁晨驰董同昕
Owner TIANJIN UNIV
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