Method for quick locking of Bang-Bang digital phase-locked loop

A digital phase-locked loop and fast locking technology, which is applied in the automatic control of power, electrical components, etc., can solve the problems of long locking time and so on

Active Publication Date: 2015-07-01
成都华大九天科技有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Under the condition of ensuring the stability and locking accuracy of the Bang-Bang PLL system, the se...

Method used

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  • Method for quick locking of Bang-Bang digital phase-locked loop
  • Method for quick locking of Bang-Bang digital phase-locked loop
  • Method for quick locking of Bang-Bang digital phase-locked loop

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Embodiment Construction

[0017] The specific embodiments of the present invention will be further described below in conjunction with the accompanying drawings.

[0018] The specific working flow chart of the fast lock controller 408 is shown in Fig. 5 . When the Bang-Bang digital phase-locked loop starts or detects out-of-lock, it will automatically configure the adjustment step size and the corresponding proportional channel factor KP and integral channel factor KI. By continuously monitoring the output of BBPFD, it can be determined whether the phase-locked loop is locked. After the phase-locked loop is locked, if the locking accuracy does not meet the required accuracy, the fast locking controller will automatically modify the adjustment step size and the corresponding proportional channel factor KP and integral channel factor KI to improve the locking accuracy; when the required locking After the accuracy, if you need to continuously monitor the locking state of the phase-locked loop to quickly ...

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Abstract

The present invention relates to a method for quick locking of a Bang-Bang digital phase-locked loop. The digital phase-locked loop comprises a quick locking controller, a proportion passageway, an integration passageway and an optional Sigma-Delta modulator for enhancing locking precision. Through the adoption of the method of the patent, the contradiction between high locking precision and long locking time of the Bang-Bang digital phase-locked loop is eliminated. Under the condition of not sacrificing the locking precision, the locking speed is greatly increased and the locking time is decreased. The quick locking of the Bang-Bang digital phase-locked loop is achieved in the frequency locking mode of multistage variable step length of automatically regulating step length, the factor of the proportion passageway and the factor of the integration passageway through the adoption of information, outputted by a BBPFD (Bang-Bang Phase Frequency Detector), for reflecting phase lead or lag between a reference clock and a feedback clock. The method of the patent can be realized through the adoption of software or hardware.

Description

technical field [0001] The invention is used in a Bang-Bang digital phase-locked loop, and can accelerate the locking process of this type of phase-locked loop. Background technique [0002] PLLs are widely used in various electronic systems, such as in SOCs and processors. Traditional phase-locked loops are based on analog or mixed-signal circuits, mainly including a feedback loop composed of a phase-frequency detector (PFD), a charge pump, a loop filter, a voltage-controlled oscillator (VCO) and a feedback divider. Among them, the PFD can detect the phase difference between the input clock and the feedback clock. The difference between the Bang-Bang PFD and the usual PFD is that the Bang-Bang PFD only detects whether the phase of the input clock is leading or lagging compared to the feedback clock. [0003] With the advancement of integrated circuit technology, the working speed of CMOS devices is increasing continuously, but the working voltage is gradually decreasing....

Claims

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Application Information

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IPC IPC(8): H03L7/08
Inventor 冯东刘寅张晋民
Owner 成都华大九天科技有限公司
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