Reconfigurable fixed/floating point general adder

A fixed-point adder, adder technology, applied in the direction of instruments, electrical digital data processing, digital data processing components, etc., can solve the problems of single fixed-point addition or floating-point addition, etc., to save resources, good versatility, large resources The effect of multiplexing

Inactive Publication Date: 2017-07-21
NANJING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the existing adders generally only support a single fixed-point addition or floating-point addition operation

Method used

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  • Reconfigurable fixed/floating point general adder
  • Reconfigurable fixed/floating point general adder
  • Reconfigurable fixed/floating point general adder

Examples

Experimental program
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Embodiment Construction

[0035] The solution of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0036] Such as figure 1 As shown, the fixed-floating-point universal adder of the embodiment is mainly composed of a 48-bit fixed-point adder, a selector, and a fixed-floating point operation converter. The configuration information and data are input by the external control module, and the data operation path is determined by the configuration information (select 48-bit fixed-point addition operation or 32-bit single-precision floating-point addition operation). Finally, the input data goes through the corresponding operation path to complete the corresponding addition operation.

[0037] Such as figure 2 As shown, the 48-bit fixed-point adder is based on the tree structure of the parallel prefix adder, and on this basis, it is optimized by using the idea of ​​look-ahead carry. The 48-bit fixed-point adder can be decomposed into three 16-bit paral...

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PUM

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Abstract

The invention provides a reconfigurable fixed/floating point general adder. The general adder comprises a 48-bit fixed point adder, a selector and a fixed/floating point operation converter, wherein the 48-bit fixed point adder performs fixed point additive operation and can be reconfigured into a single-precision floating point adder; the selector selects a corresponding fixed point or floating point additive operation passage according to top configuration information and performs output control; and the fixed/floating point operation converter converts the 48-bit fixed point adder into a 32-bit single-precision floating point adder. The general adder has the advantages that a full running structure is adopted, the fixed point adder is correspondingly optimized based on a parallel prefix adder, and on the basis of guaranteeing the operation performance of the fixed point adder, operation delay of the fixed point adder is shortened, and a gate circuit area is reduced. Through the overall structure of the fixed/floating point general adder, the universality of the adder is effectively improved under the condition that precision and data throughput are guaranteed.

Description

technical field [0001] The invention discloses a fixed-floating-point universal adder, which belongs to the field of digital signal processing. Background technique [0002] In recent years, with the rapid development of electronic technology, the complexity and integration of processors have become higher and higher. Adders are a very basic and critical existence in both microprocessors and programmable logic devices. [0003] In different fields of digital signal processing, the requirements for adders are also different. According to the data types used in operations, adders can be divided into fixed-point adders and floating-point adders. The fixed-point adder requires less computing resources, but its precision is lower; the floating-point adder requires more computing resources, but its precision is high. They each have their advantages and disadvantages. However, the existing adders generally only support a single fixed-point addition or floating-point addition ope...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/501G06F7/505
CPCG06F7/501G06F7/505
Inventor 潘红兵朱志炜王晨曦秦子迪王宇宣李丽李伟何书专
Owner NANJING UNIV
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