Semiconductor device and method of making the same

A manufacturing method and semiconductor technology, applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve problems such as contact short-circuiting of storage nodes

Active Publication Date: 2021-09-14
UNITED MICROELECTRONICS CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, as the critical dimension continues to shrink, the alignment error of the photolithography process will easily lead to the formation of a single high-aspect-ratio opening corresponding to two storage node contacts at the same time, so that the subsequent formation of the storage node is electrically connected to the two Adjacent storage nodes are in contact, so that the storage node contact short circuit occurs

Method used

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  • Semiconductor device and method of making the same
  • Semiconductor device and method of making the same
  • Semiconductor device and method of making the same

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Embodiment Construction

[0027] Please refer to figure 1 and figure 2 , figure 1 It is a schematic top view of a semiconductor element according to an embodiment of the present invention, figure 2 for along figure 1 The cross-sectional schematic diagram of the section line A-A', where figure 1 and figure 2 Only the memory area where the semiconductor element is provided with a capacitor is shown, but the present invention is not limited thereto. Such as figure 1 and figure 2 As shown, the semiconductor device 100 of this embodiment includes a substrate 102 , a plurality of word lines WL, a plurality of bit lines BL and a plurality of storage node contacts SC. The substrate 102 may include a plurality of active regions AR arranged parallel to each other, and each may be a strip structure extending along the third direction D3. Specifically, the semiconductor device 100 may include an element isolation layer 104 disposed in the substrate 102 and surrounding the active region AR to define the...

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Abstract

The invention discloses a semiconductor element and its manufacturing method, comprising providing a substrate, a plurality of word lines and a plurality of bit lines, and then forming storage node contacts on each source / drain region, so that the upper surface of each storage node contact is on the The width in one direction is smaller than the width in this direction of the lower surface of each storage node contact.

Description

technical field [0001] The invention relates to a semiconductor element and a manufacturing method thereof, in particular to a dynamic random access memory capable of avoiding short-circuit of adjacent storage nodes and a manufacturing method thereof. Background technique [0002] Generally speaking, a unit structure of a random dynamic access memory (DRAM) is composed of a transistor and a capacitor, and charges are stored through the capacitor to record desired data. With the increase of applications, the size of DRAM needs to be continuously reduced in order to increase the activeness of DRAM, speed up the operation speed of components, increase the capacity of DRAM and meet the needs of consumers for miniaturized electronic devices. [0003] In a common DRAM, transistors are fabricated in a substrate, gates of transistors arranged in the same direction are connected in series through word lines, and then bit lines intersecting with the word lines are arranged on the tran...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): H01L27/108H01L21/8242H10B12/00
CPCH10B12/02H10B12/30H01L21/76804H10B12/34H10B12/315H10B12/0335H01L29/0847H01L23/5283H01L23/5226H01L21/31144H01L21/31111H01L21/76877H01L21/76802H01L29/41H10B12/31
Inventor刘姿岑冯立伟何建廷
OwnerUNITED MICROELECTRONICS CORP