Multiplying device, data processing method, chip and electronic equipment

A multiplier and data technology, applied in the computer field, can solve the problem of high complexity of multiplication operations, and achieve the effects of reducing complexity, reducing area, and reducing power consumption

Pending Publication Date: 2019-11-29
SHANGHAI CAMBRICON INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in the traditional technology, the number of non-zero bit values ​​in the code is large, and the number of corresponding partial products generated is large, resulting in high complexity for the multiplier to realize the multiplication operation

Method used

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  • Multiplying device, data processing method, chip and electronic equipment
  • Multiplying device, data processing method, chip and electronic equipment
  • Multiplying device, data processing method, chip and electronic equipment

Examples

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Embodiment Construction

[0070] In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not intended to limit the present application.

[0071] The multiplier provided by this application can be applied to AI chips, field programmable gate array FPGA (Field-Programmable Gate Array, FPGA) chips, or other hardware circuit devices for multiplication processing. The specific structural diagram is as follows figure 1 shown.

[0072] Such as figure 1 Shown is a structural diagram of a multiplier provided by an embodiment. Such as figure 1 As shown, the multiplier includes: an improved regular signed number encoding circuit 11, an improved Wallace tree group circuit 12 and an accumulation circuit 13; the improv...

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Abstract

The invention provides a multiplier, a data processing method, a chip and electronic equipment. The multiplier comprises: an improved regular signed number encoding circuit, an improved Wallace tree group circuit and an accumulation circuit. The output end of the improved regular signed number encoding circuit is connected with the input end of the improved Wallace tree group circuit; the output end of the improved Wallace tree group circuit is connected with the input end of the accumulation circuit, the multiplier can carry out regular signed number encoding on received data through the regular signed number encoding circuit, the number of obtained effective partial products is small, and therefore the complexity of multiplication operation achieved by the multiplier is reduced.

Description

technical field [0001] The present application relates to the field of computer technology, in particular to a multiplier, a data processing method, a chip and electronic equipment. Background technique [0002] With the continuous development of digital electronic technology, various types of artificial intelligence (AI) chips have become the focus of the current technology industry and society. As one of the main circuits of the AI ​​chip, the performance of the multiplier circuit is particularly important. [0003] At present, the multiplier uses every three-digit value in the multiplier as a code, and obtains partial products according to the multiplicand, and uses Wallace tree to compress all partial products to obtain the result of multiplication. However, in the conventional technology, the number of non-zero bit values ​​in the code is large, and the number of corresponding partial products generated is large, resulting in high complexity for the multiplier to imple...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/53G06N3/063
CPCG06F7/5318G06N3/063
Inventor 不公告发明人
Owner SHANGHAI CAMBRICON INFORMATION TECH CO LTD
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