Multiplier, data processing method, chip and electronic equipment
A multiplier and data technology, applied in the computer field, can solve the problem of multiplier multi-power consumption, and achieve the effect of reducing power consumption
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[0048] In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not intended to limit the present application.
[0049]The multiplier provided by this application can be applied to AI chips, field programmable gate array FPGA (Field-Programmable Gate Array, FPGA) chips, or other hardware circuit devices for multiplication processing. The specific structural diagram is as follows figure 1 shown.
[0050] figure 1 A specific structural schematic diagram of a multiplier provided for an embodiment, such as figure 1 As shown, the multiplier includes: an encoding circuit 11, a deformed Wallace tree group circuit 12 and an accumulation circuit 13, the output end of the encoding circuit 11...
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