A kind of i via cpld 2 Method and device for extending c-bus

Abstract

The present invention provides a kind of I through CPLD 2 A method and device for C bus expansion, the method includes the following steps: the BMC sends data to the CPLD, and the CPLD latches the received data; the CPLD acquires the I 2 The clock signal of the C device, and when the clock signal is high, the latched data is read 1 bit at a time to send to the I 2 C device; the CPLD continues to latch the remaining unsent data in response to the clock signal being low; the I 2 After receiving the complete data, the C-device sends a response signal to the BMC via the CPLD, and the BMC continues to transmit the next data to the CPLD in response to receiving the response signal. The present invention realizes I through CPLD 2 C bus extends and implements I 2 C clock stretching function, to save the board and reduce the cost of materials, and does not affect the function of the original motherboard.

Description

technical field [0001] The present invention relates to the field of computers, and more specifically, to a method for performing I 2 Method and device for C bus extension Background technique [0002] CPLD has been widely used in server design, in the current server system architecture, BMC will have many I 2 C bus output to connect to external I 2 C equipment (Device), but also because there are many I 2 C device, so in order to allow BMC to control all I 2 C device, the I 2 After the C bus, it will then bridge the I 2 C switch (I 2 Cswitch) to I 2 C bus for expansion, through the I 2 C switch, the BMC can control the I on all servers 2 C equipment. [0003] In the design of traditional servers, there will be a BMC on the motherboard through the I 2 C switch to control all I 2 C equipment, while the CPLD mainly controls all the power-on sequences on the motherboard, the architecture diagram is as follows figure 1 shown. In this architecture, in order to contr...

AI Technical Summary

Problems solved by technology

However, the numerous I 2 C device, there are many will I 2 C devices will support I 2 C clock stretch function, I 2 The C device pulls down the SCL clock line for some reason (data processing or preparation) (at this time the bus is in an occupied state), but the CPLD continues to communicate without judging whether the SCL (clock signal) is high idle, resulting in a system failure during the test. Crashes or malfunctions, resulting in an irreparable situation

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