Unlock instant, AI-driven research and patent intelligence for your innovation.

Semiconductor device having low dielectric film and fabrication process thereof

A technology of semiconductors and devices, which is applied in the field of semiconductor devices, can solve problems such as improving the operating speed of semiconductor devices, and achieve the effect of minimizing signal delay

Inactive Publication Date: 2003-06-25
TOKYO ELECTRON LTD
View PDF0 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Traditionally, SiN or SiON have been used for this purpose, but these materials have a specific dielectric constant greater than 4.0 and have not brought about the desired improvement in the operating speed of semiconductor devices

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Semiconductor device having low dielectric film and fabrication process thereof
  • Semiconductor device having low dielectric film and fabrication process thereof
  • Semiconductor device having low dielectric film and fabrication process thereof

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0065] Figures 3A-3C A method of manufacturing a semiconductor device according to a first embodiment of the present invention is shown.

[0066] see Figure 3A , a first insulating film 2 is formed on a substrate 1, and a second insulating film 3 is formed on the first insulating film to form a part of a semiconductor device.

[0067] Next, at Figure 3B In the step, an opening 3A is formed in the second insulating film 3, and the Figure 3C In the step of forming the opening 2A aligned with the opening 3A in the first insulating film 2, this is accomplished by applying a dry etching process in which a recipe for etching the first insulating film is used and the second insulating film is 3 is used as a hard mask.

[0068] Table 1 below shows possible combinations of materials used for the first and second insulating films 2 and 3 described above.

[0069] Hard mask layer (insulating layer 3)

HSQ

organic

SiO with C 2

layer to etch ...

no. 2 example

[0076] Figures 4A-4F A method of manufacturing a semiconductor device having a multilayer interconnection structure according to a second embodiment of the present invention is shown, wherein those components corresponding to those described above are denoted by the same symbols and descriptions are omitted.

[0077] see Figure 4A , this step corresponds to the previously described Figure 1AThe step of forming on the substrate 10 similar to Figure 1A The multilayer structure of , the difference is that, Figure 4A The structure uses etching stopper films 23, 25 and 27 made of SiOCH containing C (concentration: about 55 wt%) instead of the etch stopper films 13, 15 and 17.

[0078] Next, at Figure 4B In the step, adopt the etching formula for etching SiN film, use photoresist pattern 18 as mask to carry out dry etching process to SiOCH film 27, form an opening corresponding to photoresist opening 18A in SiOCH film 27 . It should be noted that the photoresist opening ...

no. 3 example

[0088] Figures 5A-5E A method of manufacturing a semiconductor device according to a third embodiment of the present invention is shown, in which components corresponding to those described previously are denoted by the same symbols and descriptions are omitted.

[0089] see corresponding to Figure 4A steps Figure 5A , by sequentially depositing the SiOCH film 23, the interlayer insulating film 14, the SiOCH film 25, the interlayer insulating film 16, and the SiOCH film 27, on the interconnection layer 12 provided on the interlayer insulating film 11 on the Si substrate Form a layered structure. In addition, a photoresist pattern 18 is formed on the layered structure thus formed, wherein the photoresist pattern 18 has a photoresist opening 18A corresponding to a contact hole to be formed in the multilayer interconnection structure, similarly to the foregoing description. the embodiment.

[0090] Next, at Figure 5B In the step, using the photoresist pattern 18 as a mas...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A method of fabricating a semiconductor device includes the step of depositing a second insulating film on a first insulating film, patterning the second insulating film to form an opening therein, and etching the first insulating film while using the second insulating film as an etching mask, wherein a low-dielectric film is used for the second insulating film.

Description

technical field [0001] The present invention relates generally to semiconductor devices, and more particularly, to a semiconductor device having a low dielectric film and a method of manufacturing the same. Background technique [0002] With the development of high-resolution photolithography, today's cutting-edge semiconductor integrated circuit devices contain a large number of semiconductor devices on a substrate. In such advanced semiconductor integrated circuit devices, the use of a single interconnection layer is not sufficient to interconnect the semiconductor devices on the substrate, so a multilayer interconnection structure is provided on the substrate, wherein the multilayer interconnection structure includes A plurality of interconnection layers stacked on top of each other with an interlayer insulating film in between. [0003] In particular, great efforts have been made to study the so-called dual-damascene process in multilayer interconnect structure technolo...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/522H01L21/312H01L21/316H01L21/60H01L21/768H01L23/532
CPCH01L23/53295H01L21/76811H01L21/76897H01L21/76829H01L21/76808H01L21/76813H01L21/76834H01L21/3124H01L21/7681H01L21/31633H01L21/76835H01L2924/0002H01L21/022H01L21/02134H01L21/02126H01L21/02164H01L21/0217H01L2924/00H01L21/31
Inventor 前川薰杉浦正仁
Owner TOKYO ELECTRON LTD