The invention discloses a unit
layout optimization structure of a
trench MOSFET and a preparation method thereof, the unit
layout optimization structure of the
trench MOSFET comprises an epitaxial layer, a plurality of trench structures which extend in the thickness direction and are different in depth are formed in the epitaxial layer, the trench wall of each trench structure is provided with a
gate oxide layer and is filled with a
polycrystalline silicon gate, and the
gate oxide layer and the
polycrystalline silicon gate are formed in the epitaxial layer. A first well region and a second well region which are different in extending depth are formed between the grooves, and corresponding conductive doped regions are formed on the surface
layers of the well regions respectively. According to the invention, channel units with different conduction characteristics are formed in the device by constructing grooves and well region structures with different depths, so that
current distribution flow is realized when the device is conducted, the
current density concentration phenomenon is improved, and the
current distribution uniformity and the device reliability are improved.