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An optimized cell layout structure for a trench MOSFET and its fabrication method

ActiveCN121888678BImprove distribution uniformityavoid convergenceTrench mosfetCurrent distribution
This invention discloses an optimized cell layout structure for a trench MOSFET and its fabrication method. The optimized cell layout structure of the trench MOSFET includes an epitaxial layer, within which multiple trench structures extending in the thickness direction and of different depths are formed. The trench walls are provided with a gate oxide layer and filled with a polysilicon gate. A first well region and a second well region with different extension depths are formed between the trenches, and a corresponding conductivity-type doped region is formed on the surface of each well region. By constructing trench and well region structures of different depths, this invention enables the formation of channel units with different conduction characteristics inside the device, achieving current distribution and flow when the device is turned on, improving current density concentration, enhancing current distribution uniformity, and improving device reliability.
Owner:SHENZHEN XINDIANYUAN TECH CO LTD