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Method for generating turbo-code block intersection and HARQ packet

A technology of block interleaving and interleaver, applied in the field of channel coding of digital communication systems, can solve problems such as poor performance, achieve excellent performance and improve algorithm performance.

Inactive Publication Date: 2007-11-21
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the performance is poor when combined with systematic bit puncturing at high code rates

Method used

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  • Method for generating turbo-code block intersection and HARQ packet
  • Method for generating turbo-code block intersection and HARQ packet
  • Method for generating turbo-code block intersection and HARQ packet

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Embodiment Construction

[0048] In order to facilitate a deep understanding of the technical content of the present invention, the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0049] Please refer to Figure 1 to Figure 3 together.

[0050] The invention provides a method for generating a turbo code HARQ packet based on circular buffering.

[0051] 1), the information packet is sent to a 1 / 3 code rate turbo coder to generate a system bit stream and the first and second parity bit streams. Each of the two component convolutional codes will produce a stream of parity bits, with 12 tail bits evenly distributed over the three data streams. The K-bit information is sent to turbo encoding, and the lengths of the three data streams generated are all K'=K+4.

[0052] 2) Each data stream will be rearranged by its own block interleaver for block interleaving.

[0053] The system bitstream and the first parity bitstream will use th...

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Abstract

The method comprises: the message packet is sent to a turbo code encoder with 1 / 3 code rate to generate a system bit-stream, a first even-odd check bit-stream and a second event-odd check bit-stream; wherein, the system bit-stream and the first even-odd check bit-stream uses the block interleavers which use 2M equaling lengths, based on bit-reversed order (BRO), and taken as column displacement function; bias delta of both block interleavers are zero; bias delta of the block interleaver of the second even-odd check bit-stream is not always zero. The invention also provides a cyclic buffer based turbo code HAQQ packet generation method.

Description

technical field [0001] The present invention relates to a digital communication system, in particular to a channel coding of a digital communication system. Background technique [0002] A digital communication system usually includes a source, a source coder, a channel coder, and a modulator at the transmitting end, and a demodulator, a channel decoder, a source decoder, and a sink at the receiving end, as shown in Figure 1. Show. The channel encoder is used to introduce redundant information to the information bits according to certain rules so that the channel decoder at the receiving end can correct the bit errors that occur when the information is transmitted on the channel to a certain extent. The invention improves the rate matching method of the channel coder. [0003] Channel encoders usually divide the information bits into coded blocks of a certain length for coding. Usually, the larger the coded block, the better the error correction performance, but the cost i...

Claims

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Application Information

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IPC IPC(8): H04L1/00H04L12/56H04L1/18
Inventor 徐俊左志松
Owner ZTE CORP
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