Multi-point universal transmission control interface arrangement

Abstract

The invention discloses a multi-point general-purpose input/output (GPIO) control interface device which comprises a control and processing unit, a static random access memory (SRAM), a setting switch for dip state, a general-purpose output port and a general-purpose input port which correspond to a data transmission buffer. The invention is used to be arranged in a computer system or a host of a game machine; the control and processing unit is used to control at least one peripheral function device connected with a hardware operation timer, an interruption controller, SRAM access and I/O transmission according to program editing and setting of different use requirements by an operation function controller constructed by a field programmable logic gate array (FPGA) , further to control the periphery of the computer system or the host of the game machine; and the needed data is stored into the static random access memory (SRAM).

Description

technical field [0001] The present invention relates to an interface device, in particular to a device that can be installed or dismounted in any computer system or game console to control the timer, access SRAM or GPI / O control interface device. Background technique [0002] With the improvement and maturity of the computer industry and microelectronics technology, the game host has already included all or part of the computer system functions, and can be directly connected to various peripheral control devices with different functions, such as keyboards, display screens, joysticks or mouse etc. [0003] At present, the components configured in computer systems or game consoles are mostly designed and produced in standardized or modular specifications. In other words, the assembly and matching of the main internal components of the system tend to be simplified. The operation and use of a computer system or game console often need to be connected with most functional perip...

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Problems solved by technology

[0004] However, in the design of the above-mentioned patent case, the peripheral function controller constructed in the control unit is a fixed design, and the control unit must be embedded in the system main board (Main-Board) or the south bridge chipset, in other words, If the user wants to use the control function of the embedded control unit described above, he must purc

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