Design method of DDR2 SDRAM controller of high bandwidth utilization

A design method and utilization rate technology, applied in digital transmission systems, electrical components, transmission systems, etc., can solve problems such as bandwidth utilization rate waste, achieve the effect of reducing cost pressure and overcoming insufficient bandwidth utilization rate

Inactive Publication Date: 2009-01-07
HANGZHOU RUINA SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] In addition, in DDR2SDRAM operation, there is a fixed interval time requirement (TRC) between two adjacent Active opera...

Method used

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  • Design method of DDR2 SDRAM controller of high bandwidth utilization
  • Design method of DDR2 SDRAM controller of high bandwidth utilization
  • Design method of DDR2 SDRAM controller of high bandwidth utilization

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Embodiment Construction

[0018] The most basic principle of the present invention is to allow SDRAM to provide other follow-up operations within the time of TRC and TRP as far as possible, so as to reduce unnecessary bandwidth consumption for waiting for the two times of TRP and TRC. The approach thus adopted is:

[0019] 1) Bank rotation: Banks switch Banks after each Burst operation, and try to increase the interval between two adjacent visits of each Bank under the premise of ensuring high utilization of the data bus;

[0020] 2) Precharge operation in advance: If the next operation will require Precharge and then Active, and it does not conflict with this operation, then this Precharge operation will be executed in advance before this operation. Then when this operation is completed and the Active operation of the next operation is to be performed, the TRP time has already been met.

[0021] The above two design methods hide the required time into normal data operations, and successfully avoid th...

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Abstract

The invention relates to a method for designing a controller in network data exchange equipment. The invention aims at providing a method that can improve the utilization rate of the bus under the condition that the burst-length is 8, and the method is characterized by low cost, high bandwidth and large storage. The technical proposal is: a method for designing DDR2 SDRAM controller with high bandwidth utilization rate comprises: (1) Bank rotation, Bank is switched after each Burst operation, under the premise of trying to keep high utilization rate of the data bus, the interval of adjacent twice visits of each Bank is enlarged; (2) Precharge operation is brought forward: if the next operation needs Precharge and then Active, and the next operation does not conflict with the operation, the Precharge operation is executed before the operation. The burst-length adopted by data is 8.

Description

technical field [0001] The invention relates to a key device design method of data exchange equipment, in particular to a controller design method in network data exchange equipment. Background technique [0002] With the rapid increase of network transmission speed in the communication field, various communication equipment, especially the data exchange equipment of the metropolitan area network and the backbone network, put forward the demand for larger bandwidth, larger capacity and lower cost of the buffer. The current buffer is mainly based on two kinds of memory: SDRAM and SRAM. [0003] SRAM is characterized by small capacity, which generally can only provide a storage capacity of the order of tens of Mbits. The interface data speed is low, the volume is large, and the price is high. Can reach 100%. [0004] SDRAM is characterized by large capacity. The current DDR2 SDRAM single particle can provide up to 1G-bit storage capacity; high storage density, low price, hig...

Claims

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Application Information

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IPC IPC(8): H04L12/56H04L29/02H04L12/937
Inventor 张骏路科钟林钢向斌吴辰敦邓旭
Owner HANGZHOU RUINA SCI & TECH
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