Method for controlling discontinuous physical addresses of DMA access and DMA controller

Abstract

The invention discloses a method for controlling discontinuous physical addresses of DMA access. The method comprises the following steps that: physical address boundary registers are configured for two adjacent physical memory blocks, wherein each physical address boundary register corresponds to a hole between the two adjacent physical memory blocks, and is stored with an end physical address of the previous physical memory block and a start physical address of the next physical memory block respectively; and the DMA controller updates the memory address thereof according to the accessed physical address, and compares the updated memory address with the end physical address of the physical memory block, if the updated memory address and the end physical address of the physical memory block are same, the updated memory address is transmitted to the previous physical memory block boundary, the memory address in the DMA controller is updated into the start physical address of the next physical memory block, and data is continuously transmitted and compared until data transmission is completed. Therefore, the method avoids reading failures generated when the DMA controller accesses the physical address without the physical memory block under a condition that the memory physical address is not continuous.

Description

technical field [0001] The invention relates to the field of communication technology, in particular to a method for controlling DMA access to discontinuous physical addresses and a DMA controller. Background technique [0002] In order to increase the rate of data transmission, it is proposed to use DMA (Direct Memory Address, direct memory address) for data access transmission, that is, within a certain period of time, DMAC (DMA controller) replaces CPU (Centre Processor Unit, The central processing unit) obtains the control right of the bus, and realizes the rapid transmission of a large amount of data between the memory and peripherals or different areas of the memory. DMA transfers include byte transfers and block transfers. [0003] figure 1 It is a schematic diagram of a typical DMAC. The DMA controller, CPU, memory, data port and status / control port are all connected by the bus. When transferring data from a peripheral device to the memory, the data from the input...

AI Technical Summary

Problems solved by technology

[0010] The invention provides a method and a DMA controller for controlling DMA to access discontinuous physical addresses, so as to solve the problem that in a system with continuous virtual addresses and discontinuous physical memory addresses, DMA moves data across physical storage block boundaries, causing the DMA controller to read and write failure problem

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