Flash translation layer (FTL) with data compression function and implementation method

A flash memory conversion layer and data compression technology, which is applied in the direction of electrical digital data processing, memory system, memory architecture access/allocation, etc., can solve the problems of limited service life, poor random write performance of flash solid state disk, etc., so as to prolong the service life, Improve the overall read and write performance and reduce the actual number of erases and writes

Inactive Publication Date: 2010-12-15
NAT UNIV OF DEFENSE TECH
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  • Abstract
  • Description
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AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is to introduce data compression technology into the design of flash solid state disks to realize a flash conversion layer with data compression function for the problems of poor random write performance and limited service life of flash solid state disks

Method used

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  • Flash translation layer (FTL) with data compression function and implementation method
  • Flash translation layer (FTL) with data compression function and implementation method
  • Flash translation layer (FTL) with data compression function and implementation method

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Embodiment Construction

[0038] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0039] Such as figure 1 As shown, the FTL with data compression function is mainly composed of a compressor Compressor, a decompressor Decompressor, a buffer buffer, an address mapping management module, a garbage collection module and a loss leveling module. Compressor compresses the data to be written sent by the host and writes it into Buffer; Decompressor decompresses the data read from Buffer or flash memory and returns it to the host; Buffer receives the compressed data sent by Compressor and splices it into several complete flash data pages ; The address mapping management module is responsible for the correctness of the address mapping relationship in the entire reading and writing process; the garbage collection module is responsible for reclaiming the invalid flash memory blocks; the loss leveling module is responsible for balancing the erasing and ...

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Abstract

The invention discloses a flash translation layer (FTL) with a data compression function and an implementation method. The FTL with the data compression function mainly comprises a compressor, a decompressor, a buffer, an address mapping management module, a trash recycling module and a loss balancing module. An LZ77 (Lempel-Ziv 77) algorithm based single-page compression strategy is adopted for the compression of written-in data and the decompression of readout data. A data compression technology is used for decompressing/compressing the readout/written-in data, a soft buffer is implemented in the FTL, and the data volume written-in and read-out from a flash memory solid state disk each time is reduced, thereby improving the integral reading and writing performance of the flash memory solid state disk.

Description

technical field [0001] The invention relates to a design and implementation method of a flash translation layer FTL (Flash Translation Layer) with a data compression function in a flash solid state disk. Background technique [0002] Flash memory (Flash Memory) is a semiconductor memory widely used in recent years. The development of flash memory technology has caused new changes in the storage field. Flash memory is small in size, light in weight, noiseless, and anti-vibration. Its energy consumption is only 1 / 5 to 1 / 6 of that of traditional hard disks. It is an ideal storage medium. [0003] An important feature of flash memory is that it cannot be over-written when modifying data, that is, when a page of data needs to be modified, it cannot be directly modified in situ like a disk, but the page needs to be erased and then rewritten input data. Due to the large delay of the erase operation, the new data is generally written to another blank page, and the original data is...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/06G06F12/02
CPCG06F12/0246G06F2212/401G06F2212/7201
Inventor 刘芳肖侬蔡志平刘志龙陈志广杜溢墨安龙飞
Owner NAT UNIV OF DEFENSE TECH
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