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110results about How to "Reduce the number of erasures" patented technology

Method and device for conducting data reading and writing on storage device

The invention discloses a method and device for conducting data reading and writing on a storage device. The method for conducting data writing on the storage device comprises the steps that an unused bit of a circulation bitmap in a system table is selected, a new user data page and a new address mapping page are allocated, data to be written are written to the new user data page, a physical page number of the new user data page is written to the new address mapping page, the physical page number of the new address mapping page is written to the system table, and the system table is written to the storage device. The method for conducting data reading on the storage device comprises the steps that the physical page number of the address mapping page is obtained from the system table, the physical page number of the user data page is obtained from the address mapping page, and data needing to be read are obtained from the user data page. According to the technical scheme, data reading and writing are conducted according to the two-level mapping relation of the system table, the address mapping page and the user data page, power-down can be avoided through management of the circulation bitmap, the frequency for erasing the storage device is reduced through a cache mechanism, and abrasion balance is achieved.
Owner:FEITIAN TECHNOLOGIES

Method for organizing and accessing memory database index with high performance

The invention discloses a method for organizing and accessing memory database indexes with high performance. The method comprises the following steps of: firstly, organizing an overall index table structure in stages; then, distributing a continuous virtual address space for each stage of bucket chain table in the virtual address space of a system; mapping each bucket chain table to a corresponding virtual address space; finally, organizing indexes and data in each stage of index structure by using a chain table manner, wherein each item in the chain table is a bucket organization, attribute information of the bucket organization, a pointer pointing to a next bucket organization and index entry information are stored in each bucket organization. According to a structure for organizing the database indexes provided by the invention, data are not needed to sort when being inserted or deleted; elements in a VAB (Virtual Address Bucket) are stored disorderly, data can be identified through a bitmap; different from the mode of a tree structure, the elements are not needed to sort when a datum is inserted or deleted once in order to keep the orderliness of inner elements, thus the times of frequently writing a NVM (Non-Volatile Memory) is reduced.
Owner:诸葛晴凤

Power failure protection method for intelligent IC (integrated circuit) card data

The invention discloses a power failure protection method for intelligent IC (integrated circuit) card data. When an IC card is applied, data in the card are frequently modified, and if power fails after the data are erased in the process of modification, data to be written are not normally written while the original data are erased, and important data are lost. When the data in the card are modified, information to be written is firstly backed up to an RAM (random access memory), backup checking information is then computed, a backup and restore mark is set in a restore state, the information is written into the RAM together, all data are organized in the RAM and then written into an EEPROM (electrically erasable programmable read-only memory) backup area, the data are restored, effective data are written into a target data area, and then the backup and restore mark in the backup area is modified into a backup state. Data backup time is shortened by the aid of rapid access features of the RAM, the data are organized in the RAM and then written into the EEPROM backup area once, the frequency of writing the data into an EEPROM is effectively decreased, and the service life of the IC card is prolonged.
Owner:SHANGHAI HUAHONG INTEGRATED CIRCUIT

Intelligent storage and expansion equipment and access control system and method thereof

The invention is suitable for the technical field of information storage and provides intelligent storage and expansion equipment and an access control system and an access control method thereof. The method comprises the following steps of: receiving an access command sent by a host by the intelligent storage and expansion equipment; judging whether an access address written in the command is a section address where a directory entry corresponding to an interface file is; if the access address is the section address, comparing data written in the command with initial data in the directory entry corresponding to the interface file and judging whether the data written in the command only updates a modification time parameter or an access time parameter of the directory entry corresponding to the interface file; and when the data written in the command only updates the modification time parameter or the access time parameter of the directory entry corresponding to the interface file, discarding the data written in the command by the intelligent storage and expansion equipment and returning a response in which the data is already written to the host. In the method, times of rewriting in a storage module are reduced, and the service life of the storage module is greatly prolonged.
Owner:SHENZHEN NETCOM ELECTRONICS CO LTD

Dynamic encryption method for Internet of Things device based on login serial number

The application discloses a dynamic encryption method for an Internet of Things device based on a login serial number. The method includes steps: the Internet of Things device generates a first dynamic secret key; the Internet of Things device encrypts a login message by employing the generated first dynamic secret key and obtains an encrypted login message; the Internet of Things device transmitsthe encrypted login message to an Internet of Things platform; the Internet of Things platform receives and verifies the encrypted login message, and generates a login reply message after verification; the Internet of Things platform transmits the login reply message to the Internet of Things device; the Internet of Things device receives and verifies the login reply message; and bidirectional identity authentication of the Internet of Things device and the Internet of Things platform is successful, and the Internet of Things platform and the Internet of Things device mutually transmit ordinary data messages. According to the method, the pseudo-random dynamic secret key is generated through a static secret key and the login serial number of the Internet of Things device, and the securityof communication between the Internet of Things device and the Internet of Things platform is improved.
Owner:TAIHUA WISDOM IND GRP CO LTD

Pre-writing reading circuit of resistive random access memory and operation method thereof

The invention discloses a pre-writing reading circuit of resistive random access memory. The pre-writing reading circuit includes a memory unit module, a reference current source module, a protection circuit module, a mirror circuit module, a current control module, a pulse selection and read-write logic module, a data reading module, a confirmation module, and a control buffer module. The input end of the memory unit module is respectively connected to the output end of the current control module and the output end of the protection circuit module. The output end of the memory unit module is in connection with the input end of the data reading module. A reference voltage source and a current-generating resistor are built in the reference current source module, the output end of which is in connection with the input end of the mirror circuit module. The input end of the protection circuit module is in electric connection with an external writing-read enable signal and a clock signal. The output end of the mirror circuit module is electrically connected to one input end of the current control module. The pre-writing reading circuit provided in the invention can, to some extent, solve the problems of frequent resistive random access memory unit operation, short resistive random access memory service life, and low memory unit reliability.
Owner:HUAZHONG UNIV OF SCI & TECH

SIM card file erasing and writing system and method applied to SoftSIM and readable storage medium

ActiveCN112231244AErase levelingBalanced Erase and Write TimesMemory systemsNetwork data managementEngineeringStorage management
The invention discloses an SIM card file erasing and writing system and method applied to SoftSIM and a computer readable storage medium. The system comprises a data management layer, a storage management layer and an application logic layer; the application logic layer exchanges the storage positions of the cold data and the hot data when the communication module chip is powered on, the situationthat in the long-term erasing and writing process, the erasing and writing frequency of the storage area of the hot data is far larger than that of the storage area of the cold data, and consequentlyloss is too fast is avoided, erasing and writing balance of all the storage areas is achieved, and meanwhile, when the SIM card file needs to be updated, the data to be written is cached into the logic page of the memory space; the storage management layer writes the to-be-written data in the logic page into the logic address space formed by the data management layer when the page changing condition is met, and then the data management layer writes the to-be-written data into the FLASH memory of the communication module chip, so that the erasing and writing frequency of the FLASH memory is reduced. By achieving erasing and writing balance and reducing erasing and writing times, the service life of the FLASH memory is effectively prolonged.
Owner:SHENZHEN JETLINK TECH CO LTD

Parameter storage mechanism of embedded system

The invention discloses a parameter storage mechanism of an embedded system. The parameter storage mechanism comprises an abstraction layer interface, read-write integrity, real-time performance, repeated write-in filtering and default parameter automatic generation. According to the parameter storage mechanism in claim 1, the parameter storage mechanism is characterized in that: 1) a group of configuration parameters are placed in a structured memory block with continuous addresses, and an application program directly accesses member variables in the memory block when reading and writing theconfiguration parameters, so that the problem of real-time performance is solved; 2) two storage areas with non-overlapping addresses are specified on the storage medium, and the memory block is mapped to the two storage areas on the storage medium through a control head with a CRC check field; 3) data is loaded from the storage medium to the memory block only when the system is initialized, and only one-way writing from the memory block to the storage medium is executed in a system main cycle, and 4) data writing takes the storage area as a unit, and one storage area is always in a backup state, so that the reliability problem is solved.
Owner:微网智控(北京)科技有限公司
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