Remote online upgrading method for embedded system containing CPU and FPGA

Abstract

The invention relates to a remote online upgrading method for an embedded system containing a CPU and an FPGA. The CPU (which can be a general CPU, a DSP, an MCU and the like) directly or indirectly share Flash with the FPGA, and an operating system and application software running on the CPU, logic and a lookup table running on the FPGA and the like are all stored in the Flash; the FPGA ensures that the access to the Flash is not conflicted by controlling the reset state of the CPU; and after the FPGA finishes logic loading, the FPGA delivers the access permission of the Flash to the CPU, andthe CPU realizes online upgrading of the FPGA through direct access to the Flash. By utilizing the method and the system, on the basis of realizing remote online upgrading, upgrading interfaces of application software / logic can be unified, and the upgrading complexity of the system is reduced while the reliability and the upgrading speed are both considered.

Description

technical field [0001] The present invention relates to the field of electronic technology, more specifically, belongs to the technical field of software and hardware design of embedded systems. Background technique [0002] FPGA (Field Programable Gate Array, Field Programmable Gate Array) and CPU are often used in embedded system design at the same time; FPGA involves online programming of data required for logic and other logic operations, and CPU involves online programming of operating systems and application software. Burning; there is often a need for remote upgrades. [0003] The existing upgrade methods mainly include: [0004] CPU and FPGA are independently upgraded through different interfaces; CPU upgrade interfaces include dedicated interfaces such as JTAG (Joint Test Action Group), serial interfaces such as RS232 / 422 / 485, and high-speed data interfaces such as Ethernet and PCIe ; The upgrade interface of FPGA is mainly JTAG; [0005] In addition, some embedd...

AI Technical Summary

Problems solved by technology

[0007] 1. There is no unified level format for the JTAG interface, generally LVTTL or LVCMOS, the transmission distance is limited (usually no more than 1m) and the transmission bandwidth is low (generally no more than 10Mbps, the effective bandwidth is lower); in addition, JTAG upgrades often require dedicated Programmers, programmers from different manufacturers and different devices are not compatible to use;

[0008] 2. In the aforementioned method of sending the target code required by the FPGA to the FPGA through the CPU and completing the programming by the FPGA, the reliability and speed of the programming process are low and slow due to the transfer link from the CPU to the FPGA;

[0009] 3. The current erasing and writing of Flash, especially the erasing and writing of Flash storing FPGA logic, basically requires the target sector to be completely erased before writing new data, regardless of whether the existing sector data is necessary for erasing or writing ; For devices such as Flash whose life is calculated by the number of erases and writes, it is not conducive to its long-term reliable operation

Images