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Power-aware power balancing S box unit circuit and application method thereof

A technology of power consumption balance and unit circuit, which is applied in the field of anti-power consumption attack, can solve the problems of redundant computing operations and clock cycles, high power consumption level, high matching degree requirements, etc., and achieve the effect of reducing power consumption overhead

Active Publication Date: 2012-06-20
TSINGHUA UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Such a large power consumption overhead prevents power balancing techniques from being used in low-power applications, such as contactless smart cards
Other power consumption attack defense measures (using random numbers (masks) to protect intermediate results, randomly inserting delays, etc.) also have redundant computing operations and clock cycles, and ultimately make the power consumption level much higher than ordinary designs
[0005] In addition, the use of power balance technology needs to meet the load of each balanced data line. This requirement requires a high degree of matching between the two signal lines of dual-track encoded data. If more data lines need to be satisfied loads are the same, it is impossible to achieve in actual engineering

Method used

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  • Power-aware power balancing S box unit circuit and application method thereof
  • Power-aware power balancing S box unit circuit and application method thereof
  • Power-aware power balancing S box unit circuit and application method thereof

Examples

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Embodiment

[0029] Such as figure 2 As shown, the Srd operation in the round transformation part of the AES algorithm is an S-box operation with 8-bit input and 8-bit output. For any 8-bit input in, the corresponding output is the value of the entry indexed by in in the permutation table (also 8 bits).

[0030] The structure of the power consumption-aware power balance Srd operation unit is as follows: the S-box operation logic module and the power consumption-aware compensation logic module share an operand input port, and the input ends of the circular left shifter are respectively connected to the S-box operation The result output port of the logic module and the inversion flag output port and the compensation signal output port of the power consumption sensing compensation logic module, the output end of the circular left shifter is connected to the input end of the reverse circular shifter through an interconnection line, The output port of the shifter is the result output port, th...

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Abstract

The invention discloses a power-aware power balancing S box unit circuit and an application method thereof, belonging to the technical field of power attack resistance. The power-aware power balancing S box unit circuit comprises an S box arithmetic logic module, a power-aware compensation logic module, a cycling shifter and a backcycling shifter, wherein the S box arithmetic logic module and the power-aware compensation logic module are simultaneously driven by an operand input port, and the S box arithmetic logic module calculates output values at a result output port and output values at a negative flag bit output port in accordance with input data; and the power-aware compensation logic module calculates output values at a compensation signal output port in accordance with the input data. The invention reduces the power consumption of power balancing, and provides the implementation of equivalent load balancing of multiple data lines in a random exchange interconnection line manner for the load balancing problem of the multiple data lines.

Description

technical field [0001] The invention belongs to the technical field of power consumption attack resistance, and in particular relates to a power consumption-balanced S-box unit circuit and an application method thereof. Background technique [0002] Power consumption analysis attack is an effective side-channel attack method for cryptographic algorithm chips, especially smart IC cards. It poses a threat to important fields such as finance and security. Its main working principle is: The power consumption is related to the value of the intermediate result of the operation, which is mainly reflected in approximately proportional to the Hamming distance before and after the change of the intermediate result data. In general, it is difficult to determine the value before the data change, so in the actual attack, the Hamming weight of the intermediate result is often used as the characteristic variable of the data (approximately thinking that the Hamming weight of the data is pro...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06K19/073H04L9/06
Inventor 李翔宇王飞宇
Owner TSINGHUA UNIV
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