N-bit digital-to-analog conversion apparatus

An analog conversion and digital technology, applied in the field of N-bit digital to analog conversion devices, can solve the problem of low spurious-free dynamic range

Inactive Publication Date: 2015-06-24
SPRING FOUND OF NCTU
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0008] image 3 Shown is the experimental measurement diagram of the existing N-bit digital-to-analog conversion device. The input frequency of the digital signal D[k] is 731MHZ, and the sampling speed of the clock signal CK is 1.6GS / s. It can be seen that the existing N-bit digital The analog-to-analog conversion device has the following disadvantages: the third harmonic (3rd harmonic) increases due to the non-ideal effects generated by the switching of the first switch S1 and the second switch S2, and the spurious-free dynamic range is pulled down to 43dB

Method used

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Embodiment Construction

[0037] The present invention will be described in detail below in conjunction with the accompanying drawings and embodiments.

[0038]

[0039] Such as Figure 4 As shown, the first preferred embodiment of the N-bit digital-to-analog conversion device of the present invention is suitable for receiving a binary N-bit digital signal D[k] and a clock signal CK, and the clock signal CK is in a first state and a switch between a second state (in this embodiment, the first state and the second state are respectively related to the positive phase and the negative phase of the clock signal CK). Output an analog voltage vo related to the digital signal D[k] in each cycle of the clock signal CK, N≥2, and the N-bit digital-to-analog conversion device includes: a decoder 1, a random number generator 3 and a conversion module 2 .

[0040] The decoder 1 receives the digital signal D[k] in each cycle of the clock signal CK, and converts the digital signal D[k] into a multi-bit thermomete...

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Abstract

The invention relates to an N-bit digital-to-analog conversion apparatus, which is used for receiving a digital signal and a clock signal. The clock signal is switched between a first state and a second state. Besides, the N-bit digital-to-analog conversion apparatus comprises a decoder, a random number generator and a conversion module. More specifically, the decoder is used for converting a digital signal into a multi-bit thermometer code. The random number generator is used for outputting a reset signal in a random number state; the rest signal has a plurality of bits that are arranged alternatively and randomly, wherein the arrangement mode is changed at different time; and in the reset signal, the number of the bits that are in a logic high level is equal to the number of the bits that are in a logic low level. When the clock signal is in the first state, the conversion module converts the thermometer code into an analog voltage relating to the digital signal; and when the clock signal is in the second state, the conversion module enables the analog voltage to be reduced to zero according to the reset signal. According to the invention, a spurious free dynamic range can be enlarged.

Description

technical field [0001] The invention relates to a conversion device, in particular to an N-bit digital-to-analog conversion device. Background technique [0002] Such as figure 1 As shown, the existing literature "C.-H.Lin and K.Bult, 'A 10-b, 500-MSample / s CMOS DAC in 0.6mm2'IEEE J.Solid-State Circuits, vol.33, no.12 , pp.1948-1958, Dec.1998 "proposed an existing N-bit digital-to-analog conversion device, which is suitable for receiving a binary N-bit digital signal D[k] and a clock signal CK, and clock An analog voltage vo corresponding to the digital signal D[k] is output in each period of the signal CK, and the N-bit digital-to-analog conversion device includes: a decoder 1 and a conversion module 2 . [0003] When the N-bit segmentation mode is congruent weight, the decoder 1 receives the digital signal D[k], and converts the digital signal D[k] into a 2 N Bit thermometer code (Thermometer code) T. [0004] Conversion module 2 includes 2 N A converter 21 and a load...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/66
Inventor 曾伟信吴介琮
Owner SPRING FOUND OF NCTU
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