Image-text overlay method and device

Abstract

The invention provides a graphic and textual superimposing method and device. The method includes: dividing a DDR storage space according to the amount of graphic and textual information, configuringa storage address corresponding to a DDR storage subspace for each piece of graphic and textual information; performing clock-domain conversion on each piece of graphic and textual data to obtain converted graphic and textual data; generating corresponding read address data and indication information according to each piece of control information; storing each piece of converted each graphic and textual data in the corresponding DDR storage subspace according to a graphic and textual information receiving order, and buffering each piece of indication information; and according to each piece ofread address data, reading the corresponding graphic and textual data from the DDR storage subspace, and searching out corresponding indication information according to the graphic and textual data;and inserting the corresponding graphic and textual data into a video stream according to each piece of indication information so as to achieve the graphic and textual superimposition. The graphic andtextual superimposing method has high superposition efficiency and low resource consumption, and can enable a FPGA to realize other functions while superposing the graphics and texts.

Description

technical field [0001] The present invention relates to the technical field of image-text overlay, in particular to a method and device for image-text overlay. Background technique [0002] For now, the FPGA (Field-Programmable Gate Array, Field Programmable Gate Array)-based image-text overlay solution adopted by the mainstream industry is to independently receive image-text information, clock domain conversion, data storage, After the data is read and processed, the processed graphic information is sequentially superimposed on the video stream, thereby completing the corresponding graphic superposition. However, the image-text superimposition efficiency of this graphic-text superimposition scheme is low, and it needs to consume a large amount of FPGA logic resources. Every time a piece of graphic information is added, a whole set of graphic-text reception, clock domain conversion, data storage, and data reading processing needs to be allocated. The FPGA logic resources co...

AI Technical Summary

Problems solved by technology

However, the graphics and text superposition efficiency of this graphics and text superposition scheme is low, and it needs to consume a large amount of FPGA logic resources. Each additional piece of graphics and text information needs to allocate a whole set of graphics and text reception, clock domain conversion, data storage, and data reading processing. The FPGA logic resources corresponding to the process are used to process the increased graphic information, which may easily cause a shortage of FPGA logic resources and cannot realize other functions of the FPGA

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