Layout and optimization method for IC semi-custom back-end design

A technology of integrated circuits and optimization methods, applied in computer-aided design, computing, electrical digital data processing, etc., can solve problems such as design results not meeting expectations, project development cycle delays, and increase in chip scale, so as to improve design efficiency and design. quality effect

Active Publication Date: 2022-01-04
嘉兴倚韦电子科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

While the size of the chip is shrinking, the scale of the chip is increasing, and the design complexity is also increasing
[0003] In the field of design automation EDA technology in the integrated circuit design industry, the physical wiring of the chip is an important part of the entire back-end design process. Due to the many design links in the physical wiring process, each design company has not optimized the wiring design and optimization process at present. design, the design results do not meet expectations, and the design cycle is long, which eventually leads to delays in the project development cycle or even unacceptable
[0004] At present, in the field of design automation EDA technology in the conventional integrated circuit design industry, there is no effective general method to improve the quality of the results in the wiring stage, which is a technical problem that needs to be solved urgently

Method used

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  • Layout and optimization method for IC semi-custom back-end design
  • Layout and optimization method for IC semi-custom back-end design
  • Layout and optimization method for IC semi-custom back-end design

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Embodiment Construction

[0028] The invention discloses a semi-custom back-end design wiring and optimization method for an integrated circuit. The specific implementation of the invention will be further described below in combination with preferred embodiments.

[0029] see attached figure 1 , figure 1 The specific flow of the integrated circuit semi-custom back-end design routing and optimization method is shown. Preferably, the integrated circuit semi-custom back-end design routing and optimization method includes the following steps.

[0030] Step S1: the back-end design tool imports initial data;

[0031] Step S2: Add filling cells through the back-end design tool to fix the initial layout and parasitic parameters of the layout;

[0032] Step S3: according to the above initial data, selectively process each signal line through the back-end design tool, so as to output the first wiring result;

[0033] Step S4: According to the preset priority of each signal line, the clock signal line of the...

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Abstract

The invention discloses an integrated circuit semi-custom back-end design wiring and optimization method. Step S1: The back-end design tool imports initial data. Step S2: Add filling cells through a back-end design tool to fix the initial layout and parasitic parameters of the layout. Step S3: according to the above initial data, selectively process each signal line through a back-end design tool to output a first wiring result. Step S4: According to the preset priority of each signal line, the clock signal line of the above-mentioned first wiring result is routed prior to the normal signal line through the back-end design tool, so as to output the second wiring result. The semi-custom back-end design wiring and optimization method for integrated circuits disclosed in the present invention performs targeted optimization in the wiring stage to improve design efficiency and design quality, so as to complete the target tasks of each time node in the project development cycle with high quality and high efficiency.

Description

technical field [0001] The invention belongs to the technical field of design automation EDA in the integrated circuit design industry, and in particular relates to a semi-customized back-end design wiring and optimization method for integrated circuits. Background technique [0002] With the continuous advancement of integrated circuit manufacturing technology, the size of integrated circuit chips continues to shrink. While the size of the chip is shrinking, the scale of the chip is increasing, and the complexity of the design is also increasing. [0003] In the field of design automation EDA technology in the integrated circuit design industry, the physical wiring of the chip is an important part of the entire back-end design process. Due to the many design links in the physical wiring process, each design company has not optimized the wiring design and optimization process at present. Design, so that the design results do not meet expectations, the design cycle is long a...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): G06F30/392
CPCG06F30/392
Inventor徐靖
Owner嘉兴倚韦电子科技有限公司