Ethernet Physical Layer Device with Integrated Physical Coding and Forward Error Correction Sublayer

Abstract

The present invention discloses Ethernet physical layer devices (eg, transceivers, receivers, and transmitters) with integrated physical coding and forward error correction sublayers. Each physical layer device includes a physical coding sublayer (PCS), a forward error correction sublayer (FEC), and an integrated functional block(s). Each integrated functional block stops the data flow in the PCS and a portion of the data path within the FEC (for example: a portion of the transmitter (TX) data path or a portion of the receiver (RX) data path) for a certain number of clock cycles, so that the data flow through the FEC A data processor (eg, a codeword marker (CWM) inserter or a CWM remover) included in the part of the data path processes the data stream for compensation. Using the integrated functional block(s), redundant components are not required in the PCS and FEC, thereby reducing latency, cost, and chip area consumption. Also disclosed are associated methods.

Description

technical field [0001] The present invention relates to an Ethernet physical layer device, and more particularly, to an Ethernet physical layer device with an integrated physical coding and forward error correction sublayer. Background technique [0002] The Open Systems Interconnection (OSI) model characterizes and standardizes communication functions in network link applications. No matter what kind of network link technology, this OSI model has the following layers: physical layer, data link layer, network layer, transport layer, conversation layer, presentation layer and application layer. "Ethernet" refers to a family of network linking technologies commonly used, for example, in Local Area Networks (LANs) and Metropolitan Area Networks (MANs). Different Ethernet network link technologies are defined by the Ethernet frame transfer rate (eg, in gigabits per second (Gb / s)), and these different Ethernet network link technologies are regulated by the Institute of Electrica...

AI Technical Summary

Problems solved by technology

However, depending on the Ethernet network link technology in question, the architecture of a particular OSI model layer (e.g., physical layer) may change and improvements are expected (e.g., to reduce latency, cost, and / or chip area consumption)

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