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Device for generating SPI interface figure signal and figure signal generator

A SPI interface, graphic signal technology, applied in the input/output process of instruments, data processing, electrical digital data processing, etc. Time and other issues, to achieve the effect of fast drawing speed, fast response speed, and improved throughput

Active Publication Date: 2018-06-29
WUHAN JINGCE ELECTRONICS GRP CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, the graphics signal generators supporting the SPI interface used by major display module manufacturers are all implemented by embedded CPUs. Due to the limitations of the CPU, it is impossible to achieve parallel high-speed drawing of multiple signal output channels, which affects gamma adjustment. The speed and time seriously affect the research and development, production and testing efficiency of the display module production line

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  • Device for generating SPI interface figure signal and figure signal generator

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Embodiment Construction

[0026] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute a conflict with each other.

[0027] A device for generating SPI interface graphics signals disclosed in this embodiment is used for point-screen testing of small-sized display modules supporting the SPI interface. Such as figure 1 As shown, the device of this embodiment includes a PC, a Flash memory, a DDR4 memory, and an FPGA chip with a built-in CPU processor. Among them, the FPGA chip has a plurality of graphics signal...

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Abstract

The invention discloses a device for generating an SPI interface figure signal. The device comprises a programmable logic device used for generating multiway figure signals, the programmable logic device is provided with multiple figure signal output terminals corresponding to the multiway figure signals one by one; the programmable logic device is internally provided with a data dispatcher and multiple SPI controllers correspondingly in communicating connection with the figure signal output terminals one by one; the data dispatcher is used for dispatching image data into the multiple SPI controllers in parallel; and each SPI controller is used for converting the received image dispatching data into an SPI protocol format. According to the device for generating the SPI interface figure signal, the independent control and parallel drawing of a multiway figure signal output channel are achieved based on the hardware logic of the programmable logic device, the data processing capacity ofa central processing unit can be greatly reduced, the processing performance and efficiency of the central processing unit are improved, the high-speed parallel drawing of an SPI interface display module is achieved, and then the development, production, and detection efficiency of the SPI interface display module are satisfied.

Description

technical field [0001] The invention relates to the technical field of image signal generation, in particular to a device for generating SPI interface graphic signals and a graphic signal generator. Background technique [0002] With the development and popularization of smart watches and smart bracelets, the demand for small-sized display modules based on the SPI interface has surged, thus putting forward new requirements for graphic signal generators that support the SPI interface. [0003] At present, the graphics signal generators supporting the SPI interface used by major display module manufacturers are all implemented by embedded CPUs. Due to the limitations of the CPU, it is impossible to achieve parallel high-speed drawing of multiple signal output channels, which affects gamma adjustment. The speed and time seriously affect the research and development, production and testing efficiency of the display module production line. Contents of the invention [0004] Ai...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/14G06F13/42G06F13/16G06F13/40
CPCG06F3/1407G06F13/1668G06F13/4004G06F13/4282
Inventor 叶金平刘荣华罗晨阳
Owner WUHAN JINGCE ELECTRONICS GRP CO LTD
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