Arithmetic expression parallel computing device and method

Abstract

The invention provides an algorithm expression parallel computing device and method. A main processor in the device is connected to a coprocessor through a plurality of AXI buses; the main processor is used to determine the operation data and the algorithm expression additional information in an algorithm expression to be processed; the operation data includes a multiplication sub-algorithm expression, third data to be added with a product result, and mantissa data to be multiplied by an addition result; the multiplication sub-algorithm expression includes first data and second data; the operation data and the algorithm expression additional information are sent to the coprocessor in parallel through the AXI buses; the coprocessor is used to simultaneously perform multiplication on the first data and the second data received from the AXI buses separately, and perform calculation on a product result corresponding to the same algorithm expression to be processed, the third data and the mantissa data based on the algorithm expression additional information to obtain a calculation result, thus realizing the parallel processing of multiple operation data, realizing the multi-task time-sharing parallel processing, and improving the parallel computing efficiency.

Description

technical field [0001] The invention relates to the technical field of chip design, in particular to an arithmetic parallel computing device and method. Background technique [0002] In the fields of neural network, artificial intelligence, big data processing, radar signal processing, etc., how to quickly and efficiently perform data calculation has become the direction of technological breakthroughs for engineers, from traditional general-purpose processors such as CPU and FPGA to special-purpose processors such as ASIC and GPU. ;From the traditional Von Neumann structure to the pipeline structure, re-pipeline structure to parallel computing structure; the contradiction between data processing speed and operation requirements has not been effectively resolved, so how to apply the characteristics of existing technologies and combine data processing application scenarios, High-efficiency, low-energy data computing has become a technical challenge. [0003] At present, the m...

AI Technical Summary

Problems solved by technology

[0005] In view of this, the purpose of the present invention is to provide a parallel computing device and method to alleviate the technical problems in the prior art that complex matrix operations cannot be processed in parallel

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