Physically non-clonable function IP core automatic verification device

Abstract

The invention relates to a physically non-clonable function IP core automatic verification device, wherein, the device comprises an auxiliary management unit, which is used for enabling and configuring a PUF test record storage unit, a PUF challenge hardware generation unit and a challenge storage unit according to received instruction information, and controlling the process of each cycle test; aPUF test record storage unit, a PUF challenge hardware generation unit and a challenge storage unit. The PUF challenge hardware generation unit is used for generating a strong PUF challenge that meets the bit width requirement by hardware; the challenge storage unit is used for storing a challenge generated by a software download or a PUF challenge hardware generation unit and outputting the challenge to a PUF IP core implementation unit; A PUF IP core implementation unit is configured to implement or instantiate a PUF IP core, and is capable of sending out a challenge conforming to the timing requirements of the PUF to be tested, receiving a corresponding response, and controlling or adjusting the IP; the PUF test record storage unit stores a pair of challenges and response records whenthe execution hardware challenge generation mode of the strong PUF is strong, and stores a PUF response when the execution hardware challenge generation mode of the non-strong PUF is weak. The PUF test record storage unit stores a PUF response when the execution hardware challenge generation mode of the strong PUF is strong.

Description

technical field [0001] The invention relates to a digital circuit hardware testing technology, in particular to an automatic verification device for a physical unclonable function (Physical Unclonable Function, PUF) IP core. Background technique [0002] Physical unclonable function technology is a new type of hardware security technology. Among them, the PUF based on digital circuits mainly utilizes the process deviation of logic gates or wiring in the manufacturing process to produce physical digital circuits with unique physical unclonable properties. [0003] According to the required challenges, it can be divided into two types: weak PUF and strong PUF: weak PUF does not need to challenge or only has a challenge of one bit width, mainly including SRAM type PUF, flip-flop type PUF, butterfly-shaped PUF, etc.; strong PUF PUF has more challenge-response pairs, including arbiter type, ring oscillator type and so on. [0004] PUF technology is a new generation of digital s...

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a physical unclonable function IP core automatic verification device, which is used to overcome th

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