Clock backup circuit in video processor and video processor

Abstract

The embodiment of the present application discloses a clock backup circuit in a video processor and the video processor. The input end of the first monostable trigger is connected to the main clock crystal oscillator, and the input end of the second monostable trigger is connected to the standby clock The crystal oscillator is connected, the transient time of the first monostable trigger is greater than the clock signal period output by the main clock crystal oscillator, and the transient time of the second monostable trigger is greater than the clock signal period output by the standby clock crystal oscillator; one of the logic operation modules The input terminal is connected with the output terminal of the first monostable trigger, and the other input terminal is connected with the output terminal of the second monostable trigger; the selection control terminal of the clock selection module is connected with the first monostable trigger and the second The output terminal of any one of the monostable flip-flops is connected, the enable terminal is connected with the output terminal of the logic operation module, and the two signal input terminals are respectively connected with the main clock crystal oscillator and the backup clock crystal oscillator. The embodiment of the present application does not need an additional working clock crystal oscillator, and the cost is low, and the circuit stability is good.

Description

technical field [0001] The present application relates to the field of circuit technology, in particular to a clock backup circuit in a video processor and the video processor. Background technique [0002] In the video processor system, the clock is crucial, and various control, transmission and output timings are inseparable from the clock. If the clock stopped working, the system would be paralyzed. Therefore, for the entire system, the clock must have high stability, and the stability of the clock determines the stability of the entire system. [0003] Generally, the clock of the system is generated by the crystal oscillator. Due to its certain failure rate, for the key clock of the system, the conventional design adopts the clock backup method to improve the stability of the system. The implementation method is as follows: Figure 7 . Such as Figure 7 As shown, two clock crystal oscillators are used to allocate and connect to the FPGA chip, and the FPGA chip detects ...

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