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Method for improving cache storage density based on storage space separation processing technology

A storage space and separation processing technology, applied in memory systems, electrical digital data processing, instruments, etc., can solve the problems of Cache block storage space waste, low storage resource utilization, and affecting Cache performance, so as to reduce storage space waste, The effect of increasing storage density and improving utilization

Pending Publication Date: 2020-03-31
TIANJIN UNIV
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  • Abstract
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Problems solved by technology

[0003] The Cache contains several Cache blocks, and the maximum bit width of data information stored in the Cache block is fixed. If you want to store data information with different bit widths under the same Cache storage structure, part of the storage space in the Cache block will be wasted, causing the cache The overall storage resource utilization is low, which seriously affects the performance of the Cache.

Method used

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  • Method for improving cache storage density based on storage space separation processing technology
  • Method for improving cache storage density based on storage space separation processing technology
  • Method for improving cache storage density based on storage space separation processing technology

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Embodiment Construction

[0018] The present invention will be described in further detail below in conjunction with specific embodiments.

[0019] Take the Cache applied to image processing as an example for analysis. The bit depth of an image is used to represent the color level of the image, representing the number of bits (bits) required to store each pixel. Common image bit depths include 8 bits, 16 bits, 18 bits, 24 bits, 32 bits, etc.

[0020] If the maximum bit depth of images that can be stored in the Cache is set to 32 bits, the width of the Cache block is 32 bits. In addition, the depth of the Cache block is set to 64 bits, and the Cache contains 64 Cache blocks in total. The storage space in each Cache block is divided into 4 groups of storage units according to the bit depth of the image, respectively labeled as Group 1-Group 4, and each group of storage units can store 64 pieces of 8bits pixel data.

[0021] 1) When storing an image with a bit depth not greater than 8 bits, each group of...

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Abstract

The invention discloses a method for improving cache storage density based on a storage space separation processing technology. The method comprises the following steps: 1) defining a fact that the width of a Cache block is the maximum bit width of data information stored in a Cache; 2) defining the depth of the Cache block by a user; and 3) when the data information of which the bit width is smaller than the width of the Cache block needs to be stored, separating a part of storage space in the Cache block from other storage spaces, and connecting the part of storage space with the same part of storage space in other Cache blocks to form a new storage space. The storage density of the Cache is effectively improved, the waste of storage space is reduced, and the utilization rate of internalstorage resources of the Cache is improved.

Description

technical field [0001] The invention belongs to the technical field of high-speed cache (Cache) storage, and relates to a Cache storage space separation processing technology, in particular to a method for improving high-speed cache (Cache) storage density based on the storage space separation processing technology, in which the Cache storage structure and storage area are fixed Improve the Cache storage density under the premise. Background technique [0002] In the embedded system environment, if the original data information to be processed is stored in the external memory, there will be a mismatch between the CPU processing speed and the external memory access speed. The introduction of Cache technology in the system can solve this problem and improve the Memory access efficiency, the purpose of reducing repeated access to the same address in the external memory. [0003] The Cache contains several Cache blocks, and the maximum bit width of data information stored in th...

Claims

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Application Information

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IPC IPC(8): G06F12/0871
CPCG06F12/0871
Inventor 刘强康洁
Owner TIANJIN UNIV
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