Wafer bump and manufacturing method of wafer bump
A manufacturing method and wafer technology, applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve problems such as metals are easily oxidized
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[0028] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.
[0029] Such as Figure 6 As shown, the wafer bump 100 of the present invention includes a semiconductor substrate 1 located at the bottom, a protective layer 7 located on the semiconductor substrate 1, a circuit layer embedded in the protective layer 7 and exposed from the protective layer 7 2. The first metal layer 3 and the second metal layer 4 located on the circuit layer 2 , the first photoresist 5 and the isolation layer 6 arranged around the side of the first metal layer 3 .
[0030] The material of the semiconductor substrate 1 may be silicon or gallium arsenide and the like.
[0031] The height of the protective layer 7 is higher than that of the circuit layer 2, and the middle part of the protective layer 7 forms an exposed space, and th...
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