Low-power-consumption high-speed comparator

A high-speed comparator and low power consumption technology, applied in the direction of pulse processing, electrical components, pulse technology, etc., can solve the problems of reducing the maximum working speed of the comparator, increasing the power consumption of the circuit, etc., achieving simple structure, high conversion speed, small Effect of Input Mismatch Voltage

Active Publication Date: 2020-08-07
XI AN JIAOTONG UNIV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although the input mismatch voltage of the comparator can be reduced, it also reduces the maximum operating speed of the comparator and increases the power consumption of the circuit

Method used

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  • Low-power-consumption high-speed comparator

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Embodiment Construction

[0024] The present invention will be further described below in conjunction with the accompanying drawings. The following examples are only used to illustrate the technical solution of the present invention more clearly, but not to limit the protection scope of the present invention.

[0025] The circuit structure of the present invention is as figure 1 As shown, four PMOS transistors are included, which are the first PMOS transistor P0, the second PMOS transistor PM1, the third PMOS transistor PM2, the fourth PMOS transistor PM3, and four NMOS transistors, which are respectively the first NMOS transistor NM0 and the second PMOS transistor. Two NMOS transistors NM1, third NMOS transistor NM2, fourth NMOS transistor NM3, two buffers, respectively the first buffer BUF0, the second buffer BUF1, two OR gates, respectively the first OR gate OR0, the second buffer Two OR gate OR1. The first node n0, the third node n1, the fifth node n2, the second node p0, the fourth node p1, and ...

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Abstract

The invention discloses a low-power-consumption high-speed comparator which comprises four PMOS tubes, four NMOS tubes, two first buffers, two OR gates, a first analog signal input end, a second signal input end, a first comparison result output end, a second comparison result output end and a clock control end. When the clock control end qamp is at a high level, the comparator is in a reset state. When the clock control end qamp jumps from a high level to a low level, the comparator is in a comparison state. After the comparator completes comparison, the comparator enters a latch state, and an output result is kept unchanged. According to the low-power-consumption high-speed comparator, small input mismatch voltage can be obtained by increasing the size of an input tube; the low-power-consumption high-speed comparator fully utilizes the property of high characteristic frequency of the NMOS tubes, increases the conversion speed of the comparator, has simple circuit structure and is suitable to be used in a high-speed conversion circuit.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuits, in particular to a high-speed comparator with low power consumption. Background technique [0002] Clocked comparators are commonly used in analog-to-digital converters. Analog-to-digital converters are operating faster and faster, requiring comparator circuits with faster conversion rates. Conventional comparator circuits generally have a pre-amplification circuit. Although the input mismatch voltage of the comparator can be reduced, it also reduces the maximum operating speed of the comparator and increases the power consumption of the circuit. Contents of the invention [0003] In order to overcome the problems in the prior art, the purpose of the present invention is to provide a low-power high-speed comparator circuit, which can realize high-speed conversion rate with less power consumption. [0004] In order to achieve the above object, the technical scheme ad...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K5/24
CPCH03K5/249
Inventor 王晓飞孙权严伟张龙袁婷
Owner XI AN JIAOTONG UNIV
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