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An Improved Analog Circuit Signal Noise Reduction Method

An analog circuit and signal technology, applied in the field of improved analog circuit signal noise reduction, can solve problems such as poor, effective engineering practice effects of simulated signals, etc.

Active Publication Date: 2022-06-24
NAVAL AVIATION UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the common problem of these algorithms is that they are only effective for simple simulation signals and the effect of engineering practice is not good

Method used

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  • An Improved Analog Circuit Signal Noise Reduction Method
  • An Improved Analog Circuit Signal Noise Reduction Method
  • An Improved Analog Circuit Signal Noise Reduction Method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0082] In order to verify the effectiveness of the method in the present invention, the FM-AM signal mixed with noise as shown in the following formula is considered: In the formula, the original signal x(t) is given by the appendix figure 1 Pure signal x shown 0 (t) and appendix figure 2 The SNR shown is a 3dB white Gaussian noise n(t) synthesis, and the signal waveform is shown in the appendix image 3 As shown, the sampling frequency is 1024 Hz and the simulation time is t ∈ [0, 1].

[0083] In order to intuitively judge the quality of noise reduction, the introduction correlation index C is used as a reference, and the correlation index The closer C is to 1, the closer the signal after noise reduction is to the pure signal, that is, the better the noise reduction effect.

[0084] The results of noise reduction processing using the method in the present invention are as follows Figure 4 As shown, the variation curve of the filtered signal dimension with the singula...

Embodiment 2

[0095] The first embodiment is based on the ideal conditions where the model is known and the parameters are adjustable. In practical applications, the measured signal is often unknown. In order to illustrate the application effect of the algorithm in the present invention to the actual signal, the actual signal is verified.

[0096] attached Figure 11 is the noise reduction result of a sine wave signal with a signal-to-noise ratio of 0dB. Figure 12-14 It is the noise reduction result of several unknown signals randomly extracted in a missile circuit. It can be seen that the variation trend of the filtered signal dimension in the actual measurement process is completely consistent with the simulation experiment, and the noise reduction effect is better.

Embodiment 3

[0098] This embodiment verifies the suppression effect of the method in the present invention on the modal aliasing phenomenon.

[0099] Consider the LCD decomposition of the following signal:

[0100] x(t)=cos(60πt+sin(100πt))+n(t); wherein, the signal-to-noise ratio of Gaussian white noise n(t) is 3. The LCD decomposition of x(t) is directly carried out to obtain the following Figure 15 The decomposition results shown; use the algorithm in the present invention to perform SVD on it and then LCD, and the decomposition results are shown in the attached Figure 16 shown.

[0101] Contrast attached Figure 15 and attached Figure 16 It can be seen that when the noisy signal is directly LCD, each component of the original signal is separated into more ISC components; after the improved SVD noise reduction in the present invention, the number of components is reduced, and the decomposition quality is significantly improved. Mode aliasing is significantly reduced.

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Abstract

The invention discloses an improved analog circuit signal noise reduction method, comprising the following steps, S1: performing SVD noise reduction on the original signal X to obtain a non-zero singular value sequence with the number d; S2: determining the initial order i= 2; S3: Set the first i singular values ​​to zero for reconstruction and inverse operation to obtain the filtered signal N′ i ; S4: Calculate the filtered signal N' i Dimension D i ; S5: Judgment D i‑1 ≤D 0 ≤D i Whether it is established, if established, then the coordinates of the first intersection point is the effective rank order r=i, otherwise increase the order r=i+1 (1≤i<d‑1), repeat steps S3~S5; where, D 0 is the noise dimension; the first intersection point satisfies {r||D i -D 0 |≤λ, r=min(i), 1≤i≤d}, λ is the calculation error; S6: the original signal is removed to filter the signal, and the signal after noise reduction can be obtained, which is the analog circuit using SVD in the present invention When processing signal data, under the premise that the noise characteristics remain unchanged, the singular value sequence number is used as the independent variable, and the fractal dimension of the filtered signal is used as the dependent variable to determine the effective rank order, in order to achieve the purpose of reasonable noise reduction and effectively solve the problem. The problem of modal aliasing suppression is solved.

Description

technical field [0001] The invention relates to the technical field of analog circuit signal processing, in particular to an improved noise reduction method for analog circuit signals. Background technique [0002] With the increase of service time of naval equipment, the failure caused by circuit components has increasingly become a key problem restricting its reliability and safety. Due to the complex structure of some equipment, many analog circuits and a large number of adjustable components, the fault diagnosis and maintenance work of some equipment face great challenges. In the fault diagnosis of this type of equipment, in addition to the troubleshooting and positioning of the fault point, it is more important to further determine the specific value of the out-of-tolerance parameters, the purpose of which is to guide the maintenance personnel how to quickly locate the fault and repair the out-of-tolerance parameters. Due to the influence of complex electromagnetic env...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06K9/00G06K9/62
CPCG06F2218/04G06F18/23
Inventor 盛沛徐学文张广法戴勇军盖炳良郑振白玉
Owner NAVAL AVIATION UNIV
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