Method for realizing multi-core cache consistency verification

A consistency and cache technology, applied in the field of CPU multi-core verification, to achieve the effect of accurate and fast positioning

Pending Publication Date: 2022-04-29
GUANGDONG STARFIVE TECH LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] In CPU multi-core verification, cache consistency verification is very important, but currently there is no effective method to ensure the correctness of cache consistency. F

Method used

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  • Method for realizing multi-core cache consistency verification
  • Method for realizing multi-core cache consistency verification
  • Method for realizing multi-core cache consistency verification

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Embodiment Construction

[0037] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0038] Status Modify Exclusive Shared Invalid Modify no no no Yes Exclusive no no no Yes Shared no no Yes Yes Invalid Yes Yes Yes Yes

[0039] MESI represents the four states of the cache line. In a multi-core system, the cacheline state of each core must comply with the following rules:

[0040] When the cache line state of one of the cores is in the M state, the state of the same cache...

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Abstract

The invention discloses a method for realizing multi-core cache consistency verification, which comprises the following steps of: S1, when a core updates a cache line to an M state, checking whether the cache line exists in caches of other cores; s2, when each core updates a cache line to an E state, checking whether the cache line exists in caches of other cores or not; s3, when one core updates the cache line to the S state, checking whether the cache line exists in the caches of other cores, if the state of other cores is S, checking whether the cache line data of the two cores are consistent, and meanwhile, checking whether the cache line data is consistent with the data in the memory; and S4, when one core updates the cache line to the I state, other cores are possible to be in any state, and check is not needed. According to the method and the device, by monitoring the update information of the first-level cache and the second-level cache and checking the data in the memory, the cache can be ensured to comply with an MESI consistency protocol, and meanwhile, the correctness of the data can be ensured.

Description

technical field [0001] The invention relates to the technical field of CPU multi-core verification, in particular to a method for realizing multi-core cache consistency verification. Background technique [0002] In CPU multi-core verification, cache consistency verification is very important, but currently there is no effective method to ensure the correctness of cache consistency. For multi-core systems, there is currently no effective and unified method to verify cache consistency. Consistency, there is no tool on the market that can verify cache consistency. Contents of the invention [0003] Aiming at the deficiencies in the prior art, the purpose of the present invention is to provide a method for realizing multi-core cache consistency verification, by monitoring the update information of the first-level cache and the second-level cache, and by checking the data in the memory, it can Ensure that the cache complies with the MESI consistency protocol and at the same t...

Claims

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Application Information

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IPC IPC(8): G06F11/22G06F15/16
CPCG06F11/2247G06F15/161
Inventor 沈秀红
Owner GUANGDONG STARFIVE TECH LTD
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