Verification method for ping-pong match mode of switching chip
A technology for exchanging chips and verification methods, applied in special data processing applications, instruments, electrical digital data processing, etc., can solve problems such as network influence, errors that cannot be found and corrected, and cannot be found, to achieve the effect of ensuring function and operation
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Publication Date
- 2005-06-22
- Estimated Expiration
- Not applicable · inactive patent
Smart Images
Figure 1 Figure 2 Figure 3
Abstract
Description
Technical field:
[0001] The invention relates to a method for verifying the ping-pong pairing mode of an exchange chip. Background technique:
[0002] Usually, the design of the network switching chip adopts the parallel method of design and verification to ensure that the design and verification codes conform to the original design intention. as attached figure 1 . The verifier and the designer complete the design according to their own understanding of the design requirements. It is generally believed that the chance of the verifier and the designer making the same mistake in the same place is very small, so they can check each other's mistakes, so that the design code and the verification code It ended up being exactly the same. However, although the chances of the verifier and the designer making the same mistake are small, this chance always exists. If the mistake is in the same place, since the design code and the verification code are exactly the same, once the sam...
Examples
Embodiment Construction
[0021] A kind of verification method of the ping-pong pairing mode of switching chip, it is characterized in that: be responsible for sending the sending port of sending data packet, be responsible for receiving the receiving port of receiving data packet and a data packet mailbox by mutually opposite sending and receiving data packet Composition, the verification path is as follows:
[0022] A. The sending port is responsible for sending the data packets sent to the chip port to the data packet mailbox. In the first-in-first-out (FIFO) manner, multiple Ethernet data packets enter the first-in-first-out mailbox or data packet channel in a certain order, and Mailboxes or packet channels come out in the same order first-in-first-out;
[0023] B. The receiving port takes out the data packet from the mailbox;
[0024] C. At the same time, the data packet obtained by the receiving port waits for the data packet to come out at the output port of the chip, and compares the two data ...