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Multichannel video frequency compression system based on single-chip double-nuclear DSP constitution

A technology of multi-channel video and compression system, applied in the field of multi-channel video compression system, can solve the problems of inconvenient function upgrade, not allowing multi-channel video source coding and compression, etc.

Inactive Publication Date: 2007-06-06
ZHEJIANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

An important defect of using ASIC is that it is inconvenient to upgrade functions, and it does not allow simultaneous encoding and compression of multiple video sources

Method used

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  • Multichannel video frequency compression system based on single-chip double-nuclear DSP constitution
  • Multichannel video frequency compression system based on single-chip double-nuclear DSP constitution
  • Multichannel video frequency compression system based on single-chip double-nuclear DSP constitution

Examples

Experimental program
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Embodiment Construction

[0018] As shown in Figure 1, a multi-channel video compression system based on a single-chip dual-core DSP architecture includes a video collector 110, an audio collector 120 and a dual-core DSP processor 130, and the video collector 110 and audio collector 120 are connected in parallel On the dual-core DSP processor 130, SDRAM device 140 and dual-port RAM device 150 are connected on the system bus of the dual-core DSP processor 130, and a certain amount of IO port lines 160 are also connected on the dual-core DSP processor 130. 130 is connected with an embedded processor via a dual-port RAM device 150 .

[0019] As shown in Figure 2, the dual-core DSP processor 130 is provided with

[0020] A video acquisition driver module 210 for accepting and managing video data from the video acquisition device 110;

[0021] An audio collection driver module 220 for accepting and managing audio data from the audio collector 120;

[0022] A character superposition module 230 for superimp...

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PUM

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Abstract

A multi-path video compression system based on single chip two nuclei DSP structure is prepared as parallel-connecting video collection component and audio collection component to two nuclei DSP processor, connecting SDRAM component and two-port RAM component to system bus of said processor, connecting embedded process wit two nuclei processor through two-port RAM component.

Description

technical field [0001] The invention relates to the technical field of digital video processing, in particular to a multi-channel video compression system based on a single-chip dual-core DSP architecture. Background technique [0002] Digital video surveillance system is being more and more widely used in the field of security. The video compression system is an important part of the digital video surveillance system. A video compression system with low cost, simultaneous multi-channel encoding, and flexible function upgrade is expected by users. In a video compression system, ASIC (Application Specific Integrated Circuit) or DSP processor is generally used as the core processing unit for compression encoding. An important defect of using ASIC is that it is inconvenient to upgrade functions, and it does not allow simultaneous encoding and compression of multiple video sources. The video compression system based on DSP processor overcomes the above-mentioned shortcomings, ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/24H04N7/52H04N7/167
Inventor 陈耀武郑雅羽朱威
Owner ZHEJIANG UNIV
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