Image processing method based on fpga-accelerated convolutional neural network framework

A convolutional neural network and image processing technology, applied in the field of convolutional neural network implementation, can solve the problems of increased FPGA computing time, insufficient utilization of FPGA computing resources, and no hardware description language code acceleration, etc., to achieve transmission efficiency. Effect

CN108154229BActive Publication Date: 2022-04-08XIDIAN UNIV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Publication Date
2022-04-08

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Abstract

The invention discloses a picture processing method based on an FPGA accelerated convolutional neural network framework, which mainly solves the problems of low resource utilization and slow speed in the prior art. The scheme is: 1) Calculate the fixed value of image segmentation according to the designed image parameters and FPGA resource parameters; 2) Determine the number of DDR3 according to the fixed value of the image, and allocate block ram resources; 3) Construct the volume according to 1) and 2) A product neural network framework, which includes a picture storage module, a picture data distribution module, a convolution module, a pooling module, a picture storage back DDR3 module, and an instruction register group; 4) Each module obtains control instructions from the instruction register group through handshake signals , and cooperate with each other to process the picture data according to the control instructions. The invention improves the resource utilization rate and acceleration effect through the FPGA-accelerated convolutional neural network framework, and can be used for image classification, target recognition, speech recognition and natural language processing.
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Description

technical field

[0001] The invention belongs to the technical field of computer design, in particular to a convolutional neural network implementation method, which can be used for image classification, target recognition, speech recognition and natural language processing. Background technique

[0002] With the advancement of integrated circuit design and manufacturing technology, the field programmable gate array with high-speed, high-density programmable logic resources has been developed rapidly, and the integration level of a single chip is getting higher and higher. In order to further improve FPGA performance, mainstream chip manufacturers have integrated digital signal processing chips DSP custom computing units with high-speed digital signal processing capabilities inside the chips. It is widely used in image processing, network communication and information security, bioinformatics and other application fields.

[0003] Convolutional neural network CNN is a struct...

Examples

Embodiment Construction

[0037] The embodiments and effects of the present invention will be described in detail below in conjunction with the accompanying drawings;

[0038] Step 1, process parameters.

[0039] 1.1) Read the picture and FPGA board resource parameters input by the user. The FPGA parameters include: picture size N, total block ram resource S sum , synchronous dynamic dynamic random access memory DDR3 number P and calculation function chip DSP number A;

[0040] 1.2) Design parameters, including: FPGA operation frequency f, convolution kernel size m, convolution layer number J, channel number T, pooling layer number C, activation function layer number E, multi-classification function softmax layer number G, softmax layer input number I in , softmax layer output number I out , fully connected layers Q, pooling function and activation function;

[0041] 1.3) The computer calculates the size value set X of each layer of pictures according to the read parameter values, the maximum numbe...