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179 results about "Computer design" patented technology

Comprehensive management system for platform and load integrated satellite

The invention provides a comprehensive management system for a platform and load integrated satellite and relates to the technical field of aerospace aviation. The problems that the resource use rate is low and extendibility can not be achieved due to the fact that a distributed type satellite-borne computer design method is adopted in an existing satellite electronic system are solved. The comprehensive management system for the platform and load integrated satellite comprises an integrated comprehensive control unit and a standard function extension unit. The standard function extension unit is interconnected with the integrated comprehensive control unit through an external CAN bus. The integrated comprehensive control unit is composed of a comprehensive management module, a communication interface module, a secondary power source and an arbitration logic control module. The standard function extension unit comprises an order control panel, an active temperature control panel and a mechanism control panel. According to the comprehensive management system, resources are integrated, the number of single machines and elements is reduced, orders are integrated, the order types and forwarding links are reduced, telemetering is integrated, redundant telemetering is reduced so that the bandwidth can be increased, functions are integrated, test links and test procedures are reduced, performance is integrated, and the size, the weight and power consumption of equipment are reduced.
Owner:CHANGCHUN INST OF OPTICS FINE MECHANICS & PHYSICS CHINESE ACAD OF SCI

Computer design method of standard distribution network line

The invention discloses a computer design method of a standard distribution network line. The computer design method of the standard distribution network line comprises the steps of drawing construction diagrams of overhead power distribution lines and cable lines according to distribution line design requirements and a standard diagram, accurately counting materials required by a project, and automatically generating various kinds of report forms. According to the computer design method of the standard distribution network line, the ERP (Enterprise Resource Planning) material entering process can be greatly optimized, and moreover, a preliminary budget of the material part can be automatically embedded into a rural network project preliminary budget template, and the differences between the construction diagram and an as-constructed diagram are analyzed to generate a material balance sheet after the construction diagram and the as-constructed diagram are accomplished, so that a data support is provided for the material recovery, the project auditing and the construction cost, the project materials can be managed and controlled, and create favorable conditions are created for the fixed-assets management, the base data management and the distribution network operation and maintenance management of the post-stage project.
Owner:XUYI POWER SUPPLY OF JIANGSU ELECTRIC POWER +2

Double-faced jacquard weaving technology

ActiveCN105420911AThe pattern is distinctNice appearanceWarp knittingYarnSurface layer
The invention provides a double-faced jacquard weaving technology. A double-needle spaced fabric adopts computer-designed jacquard patterns and is woven by adopting seven guide bars, and the guide bar GB1, the guide bar GB2, the jacquard guide bar JB3.1, the jacquard guide bar JB3.2, the jacquard guide bar JB4.1, the jacquard guide bar JB4.2 and the guide bar GB5 are sequentially arranged from a front needle bed to a back needle bed. The double-faced jacquard weaving technology specifically comprises the following steps that 1, the guide bar GB1 is fully threaded to serve as a first layer of yarn to be laid to form loops on the front needle bed and used for forming the surface layer of the double-needle spaced fabric; 2, the guide bar GB2 is fully threaded to serve as a second layer of yarn to be alternated to form loops to form spaced yarn for connecting the surface layer with the bottom layer; 3, the guide bar GB5 is fully threaded to serve as a fifth layer of yarn to be laid to form loops on the back needle bed and used for forming the bottom layer of the double-needle spaced fabric. The double-needle spaced fabric made through the double-faced jacquard weaving technology is clear in pattern hierarchy and has the good stereoscopic effect in visual sense; meanwhile, the production procedures are simplified, and the cost is greatly saved.
Owner:SINCETECH FUJIAN TECH CO LTD

Microprocessor with integrated high speed memory

The present invention relates to the field of (micro)computer design and architecture, and in particular to microarchitecture associated with moving data values between a (micro)processor and memory components. Particularly, the present invention relates to a computer system with an processor architecture in which register addresses are generated with more than one execution channel controlled by one central processing unit with at least one load / store unit for loading and storing data objects, and at least one cache memory associated to the processor holding data objects accessed by the processor, wherein said processor's load / store unit contains a high speed memory directly interfacing said load / store unit to the cache and directly accessible by the cache memory for implementing scatter and gather operations. The present invention improves the performance of architectures with dual ported microprocessor implementations comprising two execution pipelines capable of two load / store data transactions per cycle. By including a high speed memory inside the load / store unit, the processor is directly interfaced from its load / store units to the caches and efficiency gains are achieved by reusing the data information already present in the high speed memory structure of the load / store unit.
Owner:AVAGO TECH WIRELESS IP SINGAPORE PTE

Microprocessor with high speed memory integrated in load/store unit to efficiently perform scatter and gather operations

The present invention relates to the field of (micro)computer design and architecture, and in particular to microarchitecture associated with moving data values between a (micro)processor and memory components. Particularly, the present invention relates to a computer system with an processor architecture in which register addresses are generated with more than one execution channel controlled by one central processing unit with at least one load / store unit for loading and storing data objects, and at least one cache memory associated to the processor holding data objects accessed by the processor, wherein said processor's load / store unit contains a high speed memory directly interfacing said load / store unit to the cache and directly accessible by the cache memory for implementing scatter and gather operations. The present invention improves the performance of architectures with dual ported microprocessor implementations comprising two execution pipelines capable of two load / store data transactions per cycle. By including a high speed memory inside the load / store unit, the processor is directly interfaced from its load / store units to the caches and efficiency gains are achieved by reusing the data information already present in the high speed memory structure of the load / store unit.
Owner:AVAGO TECH WIRELESS IP SINGAPORE PTE
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