Pixel unit and display

Abstract

The invention provides a pixel unit and a display unit. And the pixel unit comprises a first metallic layer and a second metallic layer, where the first metallic layer has a grid electrode and a first electrode, the second metallic layer has a drain electrode, a source electrode and a second electrode, a first overlap region is where the drain electrode overlaps the grid electrode, a second overlap region is where the source electrode overlaps the grid electrode, a third overlap region is where the second electrode overlaps the first electrode, and the first electrode and the second electrode are of close size and mutually staggered. And the pixel unit can be applied to the display unit. Because the capacitance value of storage capacitor of the invention will change with the change of that of parasitic capacitor, it can automatically offset the deviation of the capacitance value of the parasitic capacitor caused by aligning error, thus fixing voltage variation of the storage capacitor. And when the voltage variation is fixed, it can offset the voltage variation of the storage capacitor by regulating common voltage.

Description

technical field [0001] The present invention relates to a pixel unit, in particular to a pixel unit that can automatically compensate the capacitance value of parasitic capacitance. Background technique [0002] Figure 1a is a schematic diagram of a known pixel unit. As shown in the figure, the pixel unit 1 includes a thin film transistor (Thin Film Transistor; TFT) 12 and a storage capacitor (storage capacitor; C s )14. The thin film transistor 12 has a gate electrode 122 , a source electrode 124 and a drain electrode 126 . The gate electrode 122 is coupled to the gate line 16 , and the source electrode 124 is coupled to the source line 18 . [0003] Since the gate electrode 122 is formed of the first metal layer, and the source electrode 124 and the drain electrode 126 are formed of the second metal layer, when a semiconductor layer region 128 is disposed between the first metal layer and the second metal layer When between the two metal layers, the gate electrode 122...

AI Technical Summary

Problems solved by technology

Since the pixel units in each area are not manufactured at the same time, each area may have its own alignment error, thus causing the capacitance value of the parasitic capacitance of the pixel units in each area to be different

Images