Apparatus and method for implementing high-precision buried resistance
A high-precision, wide-ranging technology, applied in the direction of assembling printed circuits with electrical components, multi-layer circuit manufacturing, etc., can solve problems such as complex process control, achieve the effects of improving resistance value accuracy, easy control of processing technology, and avoiding etching
Active Publication Date: 2011-05-04
HUAWEI DEVICE CO LTD
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Problems solved by technology
[0010]Second, in the existing buried resistance processing flow, the thickness of the copper foil layer needs to be strictly controlled, but different process parameters are required for etching copper foil layers of different thicknesses. Will lead to more complex process control
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[0034] Step 101: Etch the copper foil layer other than the preset buried resistance pattern connection terminal and the non-buried resistance area interconnection circuit to obtain the shape size of the buried resistance length direction and the non-buried resistance area interconnection line. The specific process is shown in Figure 10 and Figure 11 shown.
[0035] First coat the photoresist on the copper foil layer, and then use the exposure and development technology to obtain the photoresist mask corresponding to the connection terminal of the preset buried resistance pattern in the buried resistance area, and obtain the corresponding interconnection circuit in the non-buried resistance area. The photoresist mask is etched, and then the copper foil layer is etched, and finally the photoresist mask is cleaned to obtain the shape dimension in the length direction of the buried resistance and the interconnection circuit in the non-buried resistance area. Among them, the buried...
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The invention discloses a method for realizing embedding resistance with high accuracy and a device, which belongs to the field of electronic equipment. The method comprises: etching prearranged embedded resistance pattern connecting terminals and a conducting layer outside interconnecting circuits in a non embedded resistance zone, obtaining molded dimension on the embedding resistance length direction and the interconnecting circuits in the non embedded resistance zone, measuring the molded dimension on the embedding resistance length direction, calculating correctional molded dimension on the embedding resistance length direction, and etching a resistance layer to obtain molded embedded resistance according to the correctional molded dimension on the embedding resistance length direction. The technical scheme of the invention firstly etches the molded dimension on the embedding resistance length direction and the interconnecting circuits in the non embedded resistance zone and thenerrors which are produced by etching the molded dimension on the embedding resistance length direction are corrected through etching the molded dimension on the embedding resistance length direction,which is beneficial for increasing the resistance precision of the embedding resistance which is finally molded and enables an embedding resistance producing technique to be controlled easier.
Description
technical field [0001] The invention relates to the field of electronic equipment, in particular to a method and device for realizing high-precision buried resistance. Background technique [0002] The planar embedded resistance technology adopts the conventional printed board subtractive production process to integrate the resistors into the multilayer printed board. Plane buried resistance technology has become the most mature technology in circuit design because of its high performance, low cost and long-term stability. The application of planar buried resistance technology has the following advantages: good electrical performance, high density of buried resistance, better reliability of buried resistance and low cost. As shown in Figure 1, the buried resistance structure is composed of three layers of materials: copper foil layer 1 (can also be other conductor layers), nickel-phosphorus alloy thin film 2 (also can be other resistance layers) and insulating substrate 3 ....
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IPC IPC(8): H05K3/30H05K3/46
Inventor王洪利
OwnerHUAWEI DEVICE CO LTD