Extraction/compensation mechanism-based sampling clock synchronization method in OFDM system

Abstract

The invention discloses an extraction/compensation mechanism-based sampling clock synchronization method in an OFDM (Orthogonal Frequency Division Multiplexing) system. The method combines a sampling clock skew estimation method based on pilot sub-carrier average phase deviation increment detection with an extraction/compensation clock synchronization compensation mechanism according to sampling clock skew quantity. The method is used for solving the problem of sampling time migration caused by mismatching of clock frequency in the analog/digital conversion process of a receiving end and a digital/analog conversion process of a transmitting end of the OFDM system, so that interference between OFDM sub-carriers and phase deviation of a constellation diagram after demodulation are effectively reduced. With the method, use of an expensive voltage-controlled oscillator is avoided, and decline of system performance caused by frequently searching an FFT (Fast Fourier Transform) window by a conventional symbol synchronization module is also avoided, so that the sampling clock synchronization method provided by the invention is low in hardware cost and high in efficiency.

Description

technical field [0001] The field that the present invention relates to is a wireless communication system and method, that is, a sampling clock synchronization method for performing frequency domain processing on received pilot symbols in an OFDM wireless communication system. technical background [0002] OFDM (Orthogonal Frequency Division Multiplexing) is a high-speed transmission technology in a wireless environment. It has been widely used in WLAN, WiMAX, 3GPP LTE, and DVB-T due to its high spectral efficiency and strong resistance to frequency selective fading. And other wireless communication systems, and is the core technology of the next generation of wireless communication systems. [0003] One of the main disadvantages of OFDM is the sensitivity to the synchronization deviation of the transmitting end and the receiving end, including frequency synchronization deviation, symbol synchronization deviation and sampling clock synchronization deviation, which often caus...

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Problems solved by technology

[0007] The purpose of the present invention is to provide a sampling clock synchronization method based on a decimation / compensation mechanism in an OFDM system, to overcome the disadvantages of using a voltage-controlled oscillator to correct the high cost and high noise jitter caused by the sampling clock, and to overcome the above-mentioned existing algorithms. The frequent search of the FFT window by the synchronization module causes the degradation of system performance.

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