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Low power consumption multiposition three-valued Domino adder

A domino addition, domino technology, applied in electrical components, logic circuits, pulse technology, etc., can solve problems such as waste

Active Publication Date: 2012-12-19
智创控安(杭州)科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, the traditional adder consumes the charge from the power supply to the ground at one time, causing great waste; while the adiabatic adder using the AC pulse power supply can fully recover the charge stored in the circuit node, effectively reducing the power consumption of the circuit

Method used

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  • Low power consumption multiposition three-valued Domino adder
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  • Low power consumption multiposition three-valued Domino adder

Examples

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Embodiment

[0031] Example: such as figure 1 As shown, a four-digit three-value low-power domino adder is composed of a four-digit three-value adiabatic domino addition unit, and the three-value adiabatic domino addition unit is provided with an addend signal input terminal, an augend signal input terminal, and a low-order carry Signal input terminal, complementary low-order carry signal input terminal, high-order carry signal output terminal, complementary high-order carry signal output terminal, standard and signal output terminal, first clock signal input terminal, second clock signal input terminal and third clock signal input terminal The low-order carry signal input terminal of the first three-valued adiabatic domino addition unit is connected to 0, the complementary low-order carry signal input terminal of the first three-value adiabatic domino addition unit is connected to the second clock signal input terminal, and the first The signal input end of the three-value adiabatic domi...

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Abstract

The invention discloses a low power consumption multiposition three-valued Domino adder. The adder comprises n-numbered positions of three-valued heat insulation Domino adding units, wherein the k position of three-valued heat insulation Domino adding unit is connected with the low-position carry signal output end of the (k+1) position of three-valued heat insulation Domino adding unit by a heat insulation Domino buffer; the k position of three-valued heat insulation Domino adding unit is also connected with the complementary low-position carry signal output end of the (k+1) position of three-valued heat insulation Domino adding unit by a heat insulation Domino buffer; the ipso position and the signal output end of the j position of three-valued heat insulation Domino adding unit are connected with (n-j)-numbered heat insulation Domino buffers in sequence; the addend signal input end and augend signal input end of the j position of three-valued heat insulation Domino adding unit are connected with (j-1)-numbered heat insulation Domino buffers in sequence; k is equal to 1, 2,......, n-1; j is equal to 1, 2,......, n; and m is equal to 1, 2,......, n-1. The adder has the following advantage: the power consumption is reduced by about 61% compared with that of the conventional three-valued Domino adder adopting the direct-current power source.

Description

technical field [0001] The invention relates to a ternary adder, in particular to a multi-bit ternary low power consumption domino adder. Background technique [0002] The current digital circuit system is mainly implemented by binary logic, and the logic values ​​that can be transmitted by a single signal line are only 0 and 1, and the space and time utilization of the circuit is low. The use of multi-valued logic can greatly reduce the number of circuit input variables and increase the amount of information carried by each connection, thereby reducing the area of ​​the chip and enhancing the data processing capability. Due to its advantages in circuit area and speed, domino circuits are widely used in various high-performance circuits. Therefore, the combination of multi-valued logic and domino circuits can further reduce the circuit area, increase the information density of the circuit, and reduce the circuit cost. . [0003] Addition is the most basic arithmetic operat...

Claims

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Application Information

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IPC IPC(8): H03K19/094
Inventor 汪鹏君杨乾坤郑雪松
Owner 智创控安(杭州)科技有限公司
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