The ldpc encoder and encoding method in the dtmb of the cycle right shift accumulation base

A technology of cyclic right shift and encoder, which is applied in the application of multi-bit parity error detection coding, error correction/detection using block code, data representation error detection/correction, etc., which can solve the problem of long encoding time and increased Problems such as equipment cost, to achieve the effect of increasing encoding speed, reducing hardware cost and power consumption, and reducing memory and logic resource requirements

Inactive Publication Date: 2016-06-22
COMMUNICATION UNIVERSITY OF CHINA
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Problems solved by technology

When implemented in hardware, such a large storage requirement increases equipment cost and takes longer to encode

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  • The ldpc encoder and encoding method in the dtmb of the cycle right shift accumulation base
  • The ldpc encoder and encoding method in the dtmb of the cycle right shift accumulation base
  • The ldpc encoder and encoding method in the dtmb of the cycle right shift accumulation base

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Embodiment Construction

[0023] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

[0024] QC-LDPC code is a special kind of LDPC code. Its generator matrix G and check matrix H are both arrays composed of cyclic matrices, which have the characteristics of segmented cyclic, so they are called quasi-cyclic LDPC codes. From the point of view of rows, each row of the circulatory matrix is ​​the result of a cyclic right shift of the previous row (the first row is the last row); from the perspective of columns, each column of the circulatory matrix is ​​the previous column (the first row is the last row). column) the result of circularly shifting down one bit. The set of row vectors of a circulant matrix is ​​exactly the same as the set of column vectors. Therefore, a circulant matrix can be completely characterized by its first row or column. The row and column weights of a circul...

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Abstract

The invention relates to a scheme for realizing the encoding of 3 kinds of QC-LDPC (Quasi-Cyclic Low-Density Parity-Check) codes with different code rates in a DTMB (Digital Terrestrial Multimedia Broadcasting) system. The invention is characterized in that an encoder of the QC-LDPC codes in the system is based on a cycle right shift accumulation mechanism and mainly comprises a controller, a vector memory, a cycle right shift table, a cycle right shift accumulator and a parallel cycle left shift accumulator. An encoding method provided by the invention is simple in process, strong in step consistency and easy to realize, backward recursion computation is simplified, and the complex operation of reading out, computation and writing back is not required. The QC-LDPC encoder provided by the invention is compatible with multiple code rates, and the logic resource demand is effectively reduced while the encoding speed can be obviously increased. The QC-LDPC encoder has the advantages of easiness in realization, high encoding speed, low resource consumption, low power consumption, low cost and the like.

Description

technical field [0001] The invention relates to the field of digital terrestrial television broadcasting, in particular to an efficient implementation method of a QC-LDPC code encoder in a DTMB system. Background technique [0002] Since various distortions and noises in the transmission channel will interfere with the transmitted signal, bit errors in the digital signal will inevitably occur at the receiving end. In order to reduce the bit error rate, channel coding technology needs to be adopted. [0003] Low-Density Parity-Check (Low-Density Parity-Check, LDPC) codes have become a research hotspot in the field of channel coding because of their excellent performance of approaching the Shannon limit. The quasi-cyclic LDPC code (Quasic-LDPC, QC-LDPC) code is a special LDPC code, and its coding can be realized by using a Shift-Register-Adder-Accumulator (SRAA). At present, QC-LDPC codes have been widely used in standards such as IEEE802.11n, 802.16e and China's digital ter...

Claims

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Application Information

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IPC IPC(8): H03M13/11
Inventor 杨霏蔡超时周德扬
Owner COMMUNICATION UNIVERSITY OF CHINA
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