LDPC (low-density parity-check) encoder and encoding method in DTMB (digital terrestrial multimedia broadcasting) system based on shared register

A technology of registers and encoders, which is applied to the application of multi-bit parity error detection coding, error correction/detection using block codes, data representation error detection/correction, etc., which can solve the problem of long coding time and increased equipment costs and other issues to achieve the effect of improving encoding speed, reducing hardware cost and power consumption, and reducing logic resource requirements

Inactive Publication Date: 2013-01-02
COMMUNICATION UNIVERSITY OF CHINA
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Problems solved by technology

When implemented in hardware, such a large storage requirement increases equipment cost and takes longer to encode

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  • LDPC (low-density parity-check) encoder and encoding method in DTMB (digital terrestrial multimedia broadcasting) system based on shared register
  • LDPC (low-density parity-check) encoder and encoding method in DTMB (digital terrestrial multimedia broadcasting) system based on shared register
  • LDPC (low-density parity-check) encoder and encoding method in DTMB (digital terrestrial multimedia broadcasting) system based on shared register

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Embodiment Construction

[0024] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

[0025] QC-LDPC code is a special kind of LDPC code. Its generator matrix G and check matrix H are both arrays composed of cyclic matrices, which have the characteristics of segmented cyclic, so they are called quasi-cyclic LDPC codes. From the perspective of rows, each row of the circulatory matrix is ​​the result of the previous row (the first row is the last row); from the perspective of columns, each column of the circulatory matrix is ​​the result of the previous column (the first row is the last row). column) the result of circularly shifting down one bit. The set of row vectors of a circulant matrix is ​​exactly the same as the set of column vectors. Therefore, a circulant matrix can be completely characterized by its first row or column. The row and column weights of a circular matrix ar...

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Abstract

The invention relates to a scheme for encoding QC-LDPC (quasi-cyclic low-density parity-check) codes with three kinds of different code rates in a DTMB (digital terrestrial multimedia broadcasting) system. The scheme is characterized in that an encoder for the QC-LDPC codes of the system is based on a register sharing mechanism and mainly comprises five parts, i.e. a shared register part, a multifunctional shifter part, a parallel filter part, a linear feedback shift register part and a parallel rotate left accumulator part. The latter four function modules share sixty-two b-bit registers. The QC-LDPC encoder provided by the invention has the advantages that the memory is not needed, the QC-LDPC encoder is compatible with multiple code rates, the encoding time is not related to the code rates, the encoding speed can be obviously improved, the logic resource demands are effectively decreased, the encoding speed is fast, the resource consumption is small, the power consumption is small, the cost is low and the like.

Description

technical field [0001] The invention relates to a digital terrestrial television broadcasting technology, in particular to an efficient implementation method of a QC-LDPC code encoder in a DTMB system. Background technique [0002] Since various distortions and noises in the transmission channel will interfere with the transmitted signal, bit errors in the digital signal will inevitably occur at the receiving end. In order to reduce the bit error rate, channel coding technology needs to be adopted. [0003] Low-Density Parity-Check (Low-Density Parity-Check, LDPC) codes have become a research hotspot in the field of channel coding because of their excellent performance of approaching the Shannon limit. The quasi-cyclic LDPC code (Quasic-LDPC, QC-LDPC) code is a special LDPC code, and its coding can be realized by using a Shift-Register-Adder-Accumulator (SRAA). At present, QC-LDPC codes have been widely used in standards such as IEEE 802.11n, 802.16e and China's digital te...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/11
Inventor 张鹏蔡超时万欣
Owner COMMUNICATION UNIVERSITY OF CHINA
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