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Ternary low-power-consumption domino comparison unit

A comparison unit and low power consumption technology, which is applied in the field of ternary low power consumption domino comparison unit, can solve the problem of large dynamic energy consumption, and achieve the effects of power saving, correct logic function and obvious power consumption characteristics

Active Publication Date: 2015-06-03
NINGBO UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Domino circuits typically exhibit high switching activity due to periodic pre-charging and discharging operations and thus high dynamic energy consumption

Method used

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  • Ternary low-power-consumption domino comparison unit
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  • Ternary low-power-consumption domino comparison unit

Examples

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Embodiment

[0034] Embodiment: as shown in Fig. 3 (a), a kind of three-valued low-power consumption domino comparison unit comprises the first control circuit Y for controlling logic 2 signal generation 1 , the second control circuit Y for controlling logic 1 signal generation 2 and comparison signal generating circuit Y 3 . Its symbol is shown in Figure 3(b).

[0035] As shown in Figure 4(a), in this embodiment, the first control circuit Y 1 Including the first PMOS transistor P1, the second PMOS transistor P2, the first NMOS transistor N1, the second NMOS transistor N2, the third NMOS transistor N3, the fourth NMOS transistor N4, the fifth NMOS transistor N5, the sixth NMOS transistor N6, the Seventh NMOS tube N7, eighth NMOS tube N8, ninth NMOS tube N9, tenth NMOS tube N10, eleventh NMOS tube N11, twelfth NMOS tube N12, thirteenth NMOS tube N13, fourteenth NMOS tube N14 Connect with the drain of the fifteenth NMOS transistor N15, the drain of the first PMOS transistor P1, the drain...

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Abstract

The invention discloses a ternary low-power-consumption domino comparison unit. The ternary low-power-consumption domino comparison unit comprises a first control circuit, a second control circuit and a comparison signal generation circuit, wherein the first control circuit and the second control circuit are respectively used for controlling generation of signals of logics 2 and 1. A comparator comprises at least two ternary low-power-consumption domino comparison units, wherein a comparison result of a first complementary value signal and a second complementary value signal, which are output from a high-order ternary low-power-consumption domino comparison unit, serves as a complementary high-order comparison output signal which is connected to a low-order ternary low-power-consumption domino comparison unit. The ternary low-power-consumption domino comparison unit has the advantages of correct logic function and simple structure. Compared with the conventional ternary domino value comparison unit adopting a direct current power supply, the comparator has the obvious characteristic of low power consumption, and the power consumption is saved by about 60 percent.

Description

technical field [0001] The invention relates to a numerical comparison circuit, in particular to a three-value low-power consumption domino comparison unit. Background technique [0002] The numerical comparator is one of the important digital devices in the digital system, and it is the most basic unit of the arithmetic operator, which is used to judge the magnitude of two numerical values. Using a numerical comparator with a ternary signal, the comparison result (greater than, equal to, less than) can be represented by a ternary signal. Compared with the same number of binary signals, the former can reduce the connection between circuit systems and increase the ability of a single line to carry information , thereby improving the utilization rate of space and time, and reducing the power consumption of the numerical comparator. As the comparison unit constitutes the main module of the numerical comparator, its power consumption determines the power consumption of the comp...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K5/22
Inventor 汪鹏君郑雪松杨乾坤
Owner NINGBO UNIV
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