Phase detection and starting circuit used in multiphase clock generating circuit of high-speed serial interface
A high-speed serial interface, multi-phase clock technology, applied in the direction of automatic power control, electrical components, etc., can solve the problems of wrong locking of multi-phase clock circuit, high difficulty of phase detector design, low phase detection accuracy, etc., to prevent Error lock and harmonic lock, novel idea, slow resolution effect
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[0019] The following will be described in detail in conjunction with the accompanying drawings of the embodiments.
[0020] refer to Figure 4 , The multi-phase clock generation circuit in the high-speed serial interface of the embodiment forward clock structure includes: a voltage-controlled delay line (VCDL), a charge pump (CP, Charge Pump), a phase detector (PD), a start-up circuit and a loop Filter (LF, Loop Filter), etc. The voltage-controlled delay line is composed of 8 delay units, and the delay of each delay unit is completely equal. Through the voltage-controlled delay line, multiple clocks CK0, CK1, CK2, CK3, CK4, and CK5 with equal phase difference can be obtained. , CK6, CK7, CK8.
[0021] figure 1 It is a block diagram of the phase detection and start-up circuit generated by the multi-phase clock, Figure 4 used in figure 1 The phase detection and start-up circuit shown. In order to illustrate the principle of the phase detection and start-up circuit, the ab...
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