A phase detection and starting circuit used in a multiphase clock generating circuit of a high-speed serial interface comprises a phase detector and a starting circuit, wherein the phase detector is provided with three input ends and two output ends, the starting circuit is connected with the input end of the phase detector, and the starting circuit comprises an AND gate, a first D trigger, a second D trigger, a third D trigger, a first CML2CMOS circuit, a second CML2CMOS circuit, a third CML2CMOS circuit, a first buffer, a second buffer and a third buffer. The circuit controls initial states of clock signals entering the phase detector when the multiphase clock generating circuit starts working, so that the wrong locking and the harmonic locking of the multiphase clock generating circuit can be effectively prevented, the phase detector adopts the current mode logic technology, the working efficiency is high, and the incoming mismatching jittering is low.