Partial parallel input left shift accumulation QC-LDPC encoder in near-earth communications

A near-earth communication and encoder technology, applied in the field of channel coding, can solve the problems of low operating frequency, high power consumption, and high cost, so as to improve operating frequency and throughput, reduce registers and connections, and reduce power consumption and cost. Effect

Inactive Publication Date: 2014-07-16
RONGCHENG DINGTONG ELECTRONICS INFORMATION SCI & TECH CO LTD
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Problems solved by technology

[0011] The existing implementation scheme of QC-LDPC encoder in the CCSDS near-earth communication system has the disadvantages of high power consumption, high cost, complex circuit structure,

Method used

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  • Partial parallel input left shift accumulation QC-LDPC encoder in near-earth communications
  • Partial parallel input left shift accumulation QC-LDPC encoder in near-earth communications
  • Partial parallel input left shift accumulation QC-LDPC encoder in near-earth communications

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Embodiment Construction

[0019] The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, so as to define the protection scope of the present invention more clearly.

[0020] Let the generator polynomial g i,j =(g i,j,0 , g i,j,1 ,..., g i,j,b-1 ), then G i,j can be viewed as a weighted sum of cyclically right-shifted versions of the identity matrix, namely

[0021] G i,j =g i,j,0 I r(0) +g i,j,1 I r(1) +…+g i,j,b-1 I r(b - 1) (4)

[0022] Then, the i-th item on the right side of the equation (2) can be expanded as

[0023] s i G i , j = ...

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Abstract

The invention provides a partial parallel input left shift accumulation QC-LDPC encoder in near-earth communications. The partial parallel input left shift accumulation QC-LDPC encoder comprises two generator polynomial lookup tables which prestores all circulant matrix generator polynominals in a generated matrix, two 511-bit binary multipliers which are used for conducting scalar multiplication on information segments and generator polynomial bits, two 511-bit binary adders which are used for conducting modulo 2 addition on products and the content of shifting registers, and two 511-bit shifting registers which are used for storing the sum of bits which are rotated once to the left. Finally, calibration data are included in the two shifting registers. The partial parallel input encoder is suitable for QC-LDPC codes in a CCSDS near-earth communication system, and has the advantages of being few in register, simple in structure, small in power consumption, low in cost, high in working efficiency, large in throughput capacity and the like.

Description

technical field [0001] The invention relates to the field of channel coding, in particular to a cumulative left-shift QC-LDPC coder with partial parallel input in a CCSDS near-earth communication system. Background technique [0002] Low-Density Parity-Check (Low-Density Parity-Check, LDPC) code is one of efficient channel coding techniques, and Quasi-Cyclic LDPC (QC-LDPC) code is a special LDPC code. Both the generation matrix G and the check matrix H of the QC-LDPC code are arrays composed of circulant matrices, which have the characteristics of a segmented cycle, so they are called QC-LDPC codes. The first row of the circulant matrix is ​​the result of the cyclic right shift of the last row by 1 bit, and the remaining rows are the result of the cyclic right shift of the previous row by 1 bit. Therefore, the circulant matrix is ​​completely characterized by its first row. Usually, the first row of a circulant matrix is ​​called its generator polynomial. [0003] The CCSD...

Claims

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Application Information

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IPC IPC(8): H03M13/11
Inventor 张鹏刘志文张燕
Owner RONGCHENG DINGTONG ELECTRONICS INFORMATION SCI & TECH CO LTD
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