Parallel processing method and device for high-speed serial signals in serdes

Abstract

The invention discloses a processing method and a device for parallelizing high-speed serial signals in a SerDes. The processing method comprises the steps of 1 using an eight-phase clock subjected to frequency division at input signal frequency as a sampling clock, controlling high-speed serial signal sampling and performing phase adjustment and locking to obtain eight-way sampling data; 2 using a two-phase clock as a shifting clock, performing serial shifting on the eight-way sampling data under the control of the shifting clock and serially outputting all of data; 3 performing frequency division on the two-phase clock to obtain a low-speed assembly clock, controlling eight-way serial data sampling, parallelly outputting all of data, performing phase adjustment and then synchronously outputting the data. The device comprises a high-speed sampling module, a high-speed serial shifting module and a low-speed assembly module for the method. The device has the advantages of being simple in achieving method, capable of achieving high-speed sampling of the high-speed serial signals and parallelization processing after sampling and high in execution efficiency.

Description

technical field [0001] The invention relates to the technical field of SerDes in high-speed serial port interconnection technology, in particular to a method and device for data parallel assembly in SerDes. Background technique [0002] With the rapid development of integrated circuit technology, the interconnection of computing or communication platforms requires higher and higher data transmission rates, and bus performance has become a bottleneck restricting system performance. Buses such as RapidIO, PCIe, Hypertransport, and InfiniBand introduced in recent years are dedicated to interconnecting peripheral devices such as computing and communication platform applications, providing high-speed, high-performance, point-to-point, full-duplex, and differential signal links for interconnected devices The I / O serial bus has broad application prospects. To realize these serial protocol standards, the key SerDes technology is inseparable. SerDes is the meaning of serial deseria...

AI Technical Summary

Problems solved by technology

Commonly used methods for connecting signals with different bit widths in the asynchronous clock domain include FIFO-based methods, asynchronous handshake signal connection methods, and synchronizer methods. However, these methods are not suitable for parallel processing of high-speed serial signals.

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