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Chip device and method of manufacturing chip device

A chip and chip carrier technology, applied in the field of chip devices and chip manufacturing devices, can solve the problems of thermal mechanical stress affecting chip reliability and other issues

Active Publication Date: 2017-05-10
INFINEON TECH AG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the thermomechanical stress due to the difference in CTE between different materials affects the reliability of the chip

Method used

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  • Chip device and method of manufacturing chip device
  • Chip device and method of manufacturing chip device
  • Chip device and method of manufacturing chip device

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Embodiment Construction

[0013] The following detailed description refers to the accompanying drawings, which show, by way of illustration, specific details and embodiments in which the invention may be practiced.

[0014] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiment or design described herein as "exemplary" should not necessarily be construed as preferred or advantageous over other embodiments and designs.

[0015] The word "over" used with respect to deposited material formed "on" a side or surface may be used herein to mean that the deposited material may be formed "directly over" the implied side or surface, for example with the implied The sides or surfaces of the fingers are in direct contact. The term "over" used with reference to deposited material formed "on" a side or surface may be used herein to mean that the deposited material may be formed "indirectly over" the implied side or surface, one or more An additional layer is ...

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PUM

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Abstract

In various embodiments, chip arrangements and methods of fabricating chip arrangements are provided. A chip arrangement may include a chip carrier and a chip mounted on the chip carrier. The chip may comprise at least two chip contacts and an insulating adhesive between the chip and the chip carrier adhering the chip to the chip carrier. The at least two chip contacts may be electrically coupled to the chip carrier.

Description

technical field [0001] Various embodiments relate generally to chip arrangements and methods of manufacturing chip arrangements. Background technique [0002] After soldering or attaching the chip to the metal substrate, the cooling of the soldered or attached chip can lead to very high thermomechanical stresses. This is due to the difference in coefficient of thermal expansion (CTE) between the materials used, eg silicon and copper. Soldering is generally performed at a temperature of about 380ºC, and adhesion is generally performed at a temperature of about 200ºC. Silicon has a CTE of 2.5x10 -6 / ºC, while the CTE of copper is 16.5 / ºC. During cooling from high to low temperatures, different materials shrink differently due to different CTEs. Differences in shrinkage can lead to high thermomechanical stress. [0003] High thermomechanical stress can cause cracks in the substrate or fracture thin chips (typically <<100μm). Substrates may also bend or twist due to ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/683H01L21/58H01L21/60
CPCH01L23/49513H01L23/49517H01L23/49562H01L23/562H01L24/24H01L24/25H01L24/82H01L23/3107H01L2224/04105H01L24/29H01L24/32H01L24/06H01L24/73H01L24/92H01L2224/32245H01L2224/29387H01L2224/24246H01L2224/2518H01L2224/2929H01L2224/06181H01L2224/73267H01L2924/07802H01L2924/10271H01L2924/10253H01L2924/10252H01L2924/10329H01L2924/13091H01L2924/1305H01L2924/1306H01L2924/13055H01L2224/92144H01L2224/92244H01L2924/00H01L2924/12042H01L2924/3511
Inventor E.菲尔古特K.侯赛尼J.马勒G.迈尔-贝格R.斯泰纳
Owner INFINEON TECH AG