A Technology for Reducing Knot Pushing Time

A process and time technology, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problem of long push-in time and achieve the effect of reducing the push-in time and the time required for push-in

Active Publication Date: 2018-08-14
LITTELFUSE SEMICON WUXI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Aiming at the above-mentioned defects in the existing semiconductor process that push junction time is too long, the applicant actively studies how to improve the process based on his years of manufacturing experience and technology accumulation in this industry, in order to improve the lack of previous technology. Finally, the present invention has been developed under careful consideration of various conditions

Method used

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  • A Technology for Reducing Knot Pushing Time
  • A Technology for Reducing Knot Pushing Time

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Embodiment Construction

[0013] The content disclosed in the present invention relates to a process for reducing the junction push time. Its main technical feature is that silicon etching is performed before the normal diffusion push junction process, which reduces the distance of junction push, thereby reducing the junction push time.

[0014] Next, through the embodiments and accompanying drawings, the present invention will be described with unique technical parts such as innovation, progress or efficacy compared with the prior art, so that those skilled in the art can realize it accordingly. It should be noted that modifications and changes made by those skilled in the art without departing from the spirit of the present invention will not depart from the scope of protection of the present invention.

[0015] see figure 1 , the current technological process, which mainly includes the following steps:

[0016] First, step S100 is performed: providing a silicon wafer (this step figure 1 is shown i...

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Abstract

The invention provides a process for shortening junction pushing time, solving the problem that the junction pushing time is too long in the present semiconductor process. The method comprises the steps: uncovering the places, in need of PN junctions and the junction pushing process, on a wafer by means of a photo-etching process, and protecting the other places of the wafer with a photoresist; silicon-etching the uncovered places and etching a layer of silicon; and spreading and pushing junctions at the etched places and pushing the PN junctions to the needed places. On the basis of the present equipment, the process for shortening junction pushing time is capable of greatly shortening the needed junction pushing time in the prior art.

Description

technical field [0001] The present invention relates to a semiconductor process, and in particular relates to a process for reducing the push-in distance and the push-in time by performing silicon etching on a specific part on the basis of existing equipment in order to cooperate with the development of new products. Background technique [0002] In the semiconductor manufacturing process, the process of pushing the junction is often used to push the PN junction formed by diffusion to the required position to meet the requirements of manufacturing discrete devices with specified electrical properties. Pushing junctions takes up a significant amount of time throughout the semiconductor manufacturing process. How to effectively reduce the time required for pushing the junction has become an important item in reducing the cost and production cycle in the current semiconductor process. [0003] The currently used method of pushing the junction is to place the silicon wafer in a...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): H01L21/04
CPCH01L21/22
Inventor吴宗杰夏杰宇
OwnerLITTELFUSE SEMICON WUXI