Flash memory device and data reading method thereof

Abstract

The invention discloses a flash memory device and a data reading method thereof. During data reading of a memory unit, boosting voltage with a voltage value higher than the value of pre-charging voltage is supplied to a source discharge transistor so as to improve the discharge capability of the source discharge transistor.

Description

technical field [0001] The present invention relates to a memory device, and more particularly, to a flash memory device and a data reading method thereof. Background technique [0002] In a typical FLASH memory array, memory cells are arranged in a rectangular array formed by columns and rows, and memory cell transistors are arranged at intersections formed by columns and rows. The drain of each transistor is connected to the corresponding bit line, the source is connected to the drain of the array source discharge transistor via the array source line, and the gate is connected to the word line. [0003] Flash memory allows programming, reading or erasing in blocks, sectors or pages. Generally speaking, memory cells have metal oxide semiconductor (MOS) In the structure, when there is no charge stored in the floating gate of the memory cell, that is, when the write data is "1", the memory cell is normally on during reading. When there are stored electrons in the floating g...

AI Technical Summary

Problems solved by technology

When most of the data stored in the memory cells in the page group is "1", the current flowing out of the page group may exceed the maximum discharge current that the source discharge transistor can achieve, which will make the page group The size of the current flowing out of the memory cells in the memory cell is limited, which in turn affects the accuracy of reading the data stored in the memory cells and the speed of data reading

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