Scheduling system and method for equalizing memory access latency among multiple threads under NUMA architecture

Abstract

The invention discloses a scheduling system and method for equalizing memory access latency among multiple threads under a NUMA architecture. The system comprises a detecting module, a sampling module, an analyzing module, a judging module and a scheduling module. Through sampling and storing memory access information of each thread during the operating process of a multi-thread program, predicting and analyzing whether the memory access latency of the threads in the multi-thread program is out of balance or not, and scheduling reasonably according to the analysis result, performing migration scheduling on thread access variables of far-end memory access to nodes where threads are placed or performing interleaved storage to equally distribute the thread access variables to all nodes, so that memory access latency of all the threads is ensured to be basically equal. According to the scheduling system and method, by way of equalizing memory access latency among multiple threads, the operating performance of the multi-thread program under the NUMA architecture can be optimized; through a fine grit, the real-time scheduling is performed in a targeted way so that the performance optimization of the multi-thread program in a parallel region is achieved.

Description

technical field [0001] The invention belongs to the field of multi-thread performance optimization under computer architecture, and more specifically, relates to a scheduling system and method for balancing memory access delay among multi-threads under NUMA architecture. Background technique [0002] Non-uniform memory access (NUMA) architecture is one of the popular commercial server architectures. It adopts a distributed memory model, and the processors of all nodes can access all physical memory, which is easy to manage and has good scalability. Therefore, Has been widely used. [0003] In the NUMA architecture, the memory accessed by each CPU can be divided into two types: the memory on the same node as the CPU is called local memory, and the access delay is very low; the memory on a different node from the CPU is called remote memory. To access the end memory, the CPU needs to be connected through nodes, so its access delay is longer than that of the local memory. Thi...

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Problems solved by technology

[0005] For multi-threaded programs that have thread synchronization operations during operation, the running speed of each thread needs to be considered when running under the NUMA architecture. If there are some threads among the threads that need to be synchronized, due to the large number of remote memory accesses executed, If the running speed is slow, then this thread becomes the key thread that drags down the running speed of the program. At this time, in order to reduce the work done by other threads for remote memory access, it will not improve the overall performance of the final program very well.

Among the existing optimization tools for program running performance under the NUMA architecture, there is a lack of optimization methods for the problem of balancing memory access delays between multiple threads

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