Shifting register and grid driving circuit
A gate drive circuit, shift register technology, applied in static memory, digital memory information, instruments, etc., can solve problems such as affecting display quality, writing wrong grayscale values in falling time pixels, etc.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Publication Date
- 2017-05-31
Smart Images

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Abstract
Description
technical field
[0001] The present invention relates to related technologies of displays, in particular to a shift register and a gate drive circuit using the shift register. Background technique
[0002] The gate drive circuit used in the display is composed of a plurality of shift registers, each shift register is used to output a gate signal, and a pulse is provided through the gate signal to turn on the pixels of the corresponding column to Each pixel in the row of pixels can write the required gray scale value.
[0003] However, under the traditional shift register circuit structure, when the shift register turns the pulse provided by it from high level to low level, the falling time of the bit pulse is too long and the pixel Wrong grayscale values are written, thereby affecting the display quality, and this shortcoming is especially obvious in high-resolution displays. Contents of the invention
[0004] An object of the present invention is to provide a shift reg...
Examples
Embodiment Construction
[0030] To make it easy for readers to understand, the gate driving circuit of the present invention will be described first. figure 1 It is a circuit diagram of a shift register according to an embodiment of the present invention, such as figure 1 As shown, the gate drive circuit is composed of multiple shift registers. figure 1 Only the n-3th stage shift register to the n+3th stage shift register is shown in , and only the complete coupling mode of the nth stage shift register is shown, while the complete coupling of the remaining shift registers The connection method can be simulated and deduced according to the following description, and will not be repeated here.
[0031] Such as figure 1 As shown, the n-2th shift register, the n-th shift register and the n+2-th shift register all receive the clock signals CK1 and CK3, while the n-3th shift register, the n-th The first-stage shift register, the n+1-th stage shift register and the n+3-th stage shift register all receive ...